gem5 - gem5

Age	Commit message (Expand)	Author
2018-05-29	arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL as NOP	Giacomo Travaglini
2018-04-10	arch-arm: Fix mrc,mcr to cop14 disassemble	Giacomo Travaglini
2018-02-16	arch-arm: IMPLEMENTATION DEFINED register	Giacomo Travaglini
2017-12-05	arm: Add support for the mcr dc{ic,i,c}mvac, dccmvau instructions	Nikos Nikoleris
2017-11-15	arm: Add support for armv8 CRC32 instructions	Giacomo Travaglini
2016-08-02	arm: change instruction classes to catch hyp traps	Dylan Johnson
2014-10-29	arm: Mark some miscregs (timer counter) registers at unverifiable.	Ali Saidi
2014-10-01	arm: More UBSan cleanups after additional full-system runs	Andreas Hansson
2014-09-27	arm: Fixed undefined behaviours identified by gcc	Andreas Hansson
2014-04-23	arm: Don't use a stack allocated mnemonic	Mitchell Hayenga
2014-01-24	arm: Add support for ARMv8 (AArch64 & AArch32)	ARM gem5 Developers
2013-02-19	scons: Add warning for missing declarations	Andreas Hansson
2012-03-01	ARM: Add limited CP14 support.	Matt Horsnell
2011-09-13	CP15 c15: enable execution with accesses to c15 registers	Chander Sudanthi
2011-02-23	ARM: Do something for ISB, DSB, DMB	Ali Saidi
2011-02-23	ARM: Adds dummy support for a L2 latency miscreg.	Ali Saidi
2011-01-18	ARM: The ARM decoder should not panic when decoding undefined holes is arch.	Matt Horsnell
2010-11-15	ARM: Return an FailUnimp instruction when an unimplemented CP15 register is a...	Ali Saidi
2010-08-25	ARM: Adding a bogus fault that does nothing.	Min Kyu Jeong
2010-08-23	ARM: Implement some more misc registers	Ali Saidi
2010-06-02	ARM: Implement a version of mcr and mrc that works in user mode.	Gabe Black
2010-06-02	ARM: Implement the ARM TLB/Tablewalker. Needs performance improvements.	Ali Saidi
2010-06-02	ARM: Ignore reads and writes to DCIMVAC.	Gabe Black
2010-06-02	ARM: Move the CP15 decode block into a function.	Gabe Black
2010-06-02	ARM: Warn/ignore when TLB maintenance operations are performed.	Gabe Black
2010-06-02	ARM: Convert the CP15 registers from MPU to MMU.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the DRBAR, DRACR, and DRSR registers.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the BPIALLIS and BPIALL registers.	Gabe Black
2010-06-02	ARM: Ignore/warn access to the bpimva registers.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to the dccmvac register.	Gabe Black
2010-06-02	ARM: Ignore/warn on accesses to icimvau.	Gabe Black
2010-06-02	ARM: Ignore/warn on ICIALLUIS.	Gabe Black
2010-06-02	ARM: Decode the unimplemented data barrier CP15 accesses.	Gabe Black
2010-06-02	ARM: Decode the unimplemented cp15 instruction barrier.	Gabe Black
2010-06-02	ARM: Ignore accesses to DCCIMVAC.	Gabe Black
2010-06-02	ARM: Warn about and ignore accesses to DCCISW.	Gabe Black
2010-06-02	ARM: Decode the thumb versions of the mcr and mrc instructions.	Gabe Black
2010-06-02	ARM: Replace the versions of MRS and MSR in the ARM decoder with the new ones.	Gabe Black
2010-06-02	ARM: Implement SVC (was SWI) outside of the decoder.	Gabe Black