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path: root/src/arch/arm/isa/templates/mem.isa
AgeCommit message (Expand)Author
2018-03-26arch: Fix all override related warnings.Gabe Black
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2016-01-17cpu. arch: add initiateMemRead() to ExecContext interfaceSteve Reinhardt
2015-01-25arm: always set the IsFirstMicroop flagAli Saidi
2014-05-09arm: Add branch flags onto macroopsAndrew Bardsley
2014-05-09arch: teach ISA parser how to split code across filesCurtis Dunham
2014-05-09arch: remove inline specifiers on all inst constrs, all ISAsCurtis Dunham
2014-01-24arm: Add support for ARMv8 (AArch64 & AArch32)ARM gem5 Developers
2013-03-04ARM: fix some cases where instructions that write to fp reg 15 are accidently...Ali Saidi
2012-09-25ARM: Predict target of more instructions that modify PC.Ali Saidi
2011-10-31GCC: Get everything working with gcc 4.6.1.Gabe Black
2011-07-02ExecContext: Rename the readBytes/writeBytes functions to readMem and writeMem.Gabe Black
2011-07-02ISA: Use readBytes/writeBytes for all instruction level memory operations.Gabe Black
2011-04-04ARM: Fix bug in MicroLdrNeon templates for initiateAcc().Ali Saidi
2011-04-04ARM: Cleanup implementation of ITSTATE and put important code in PCState.Ali Saidi
2011-04-04ARM: Tag appropriate instructions as IsReturnAli Saidi
2011-03-17ARM: Fix RFE macrop.Matt Horsnell
2011-02-23ARM: NEON instruction templates modified to set the predicate flag to false w...Giacomo Gabrielli
2011-01-18ARM: Add support for moving predicated false dest operands from sources.Ali Saidi
2010-11-08ARM: Make all ARM uops delayed commit.Ali Saidi
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-10-22ARM: Don't pretend to writeback registers in initiateAcc.Gabe Black
2010-08-25ARM: Use fewer micro-ops for register update loads if possible.Gene WU
2010-08-25ARM: Implement all ARM SIMD instructions.Gabe Black
2010-08-23ARM: Don't write tracedata on writes, it might have been freed already.Gene Wu
2010-08-23ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.Min Kyu Jeong
2010-06-02ARM: Fix IT state not updating when an instruction memory instruction faults.Min Kyu Jeong
2010-06-02ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.Gabe Black
2010-06-02ARM: Add a base class for SRS.Gabe Black
2010-06-02ARM: Implement the strex instructions.Gabe Black
2010-06-02ARM: Add a base class for the RFE instruction.Gabe Black
2010-06-02ARM: Explicitly keep track of the second destination for double loads/stores.Gabe Black
2010-06-02ARM: Implement the swp and swpb instructions.Gabe Black
2010-06-02ARM: Define the store instructions from outside the decoder.Gabe Black
2010-06-02ARM: Define the load instructions from outside the decoder.Gabe Black