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path: root/src/arch/mips
AgeCommit message (Expand)Author
2010-12-20Style: Replace some tabs with spaces.Gabe Black
2010-12-08MIPS: Take advantage of new PCState syntax.Gabe Black
2010-12-07O3: Make all instructions that write a misc. register not perform the write u...Giacomo Gabrielli
2010-11-15O3: Make O3 support variably lengthed instructions.Gabe Black
2010-11-08ARM/Alpha/Cpu: Change prefetchs to be more like normal loads.Ali Saidi
2010-11-08sim: Use forward declarations for ports.Ali Saidi
2010-10-31ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.Gabe Black
2010-10-22ISA: Simplify various implementations of completeAcc.Gabe Black
2010-10-16Mem: Reclaim some request flags used by MIPS for alignment checking.Gabe Black
2010-10-15GetArgument: Rework getArgument so that X86_FS compiles again.Gabe Black
2010-10-01Debug: Implement getArgument() and function skipping for ARM.Ali Saidi
2010-09-13Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.Gabe Black
2010-09-10style: fix sorting of includes and whitespace in some filesNathan Binkert
2010-08-25ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)Min Kyu Jeong
2010-08-23ISA: Get rid of old, unused utility functions cluttering up the ISAs.Gabe Black
2010-08-23Loader: Make the load address mask be a parameter of the system rather than a...Ali Saidi
2010-08-17sim: revamp unserialization procedureSteve Reinhardt
2010-06-15stats: only consider a formula initialized if there is a formulaNathan Binkert
2010-06-03More minor gdb-related cleanup.Steve Reinhardt
2010-04-15tick: rename Clock namespace to SimClockNathan Binkert
2010-03-23cpu: fix exec tracing memory corruption bugSteve Reinhardt
2010-02-12O3PCU: Split loads and stores that cross cache line boundaries.Timothy M. Jones
2009-12-31MIPS: Beef up process initialization.Matt DeVuyst
2009-12-31MIPS: Implement the SE mode version of rdhwr.Gabe Black
2009-12-31MIPS: Fix decoding of the rdhwr instruction.Gabe Black
2009-12-31MIPS: Implement the set_thread_area system call.Gabe Black
2009-12-31MIPS: Create an artificial control register to hold the thread pointer.Gabe Black
2009-12-31MIPS: Extract CPU pointer from the thread context in scheduleCP0 setMiscReg.Gabe Black
2009-12-21MIPS: Add missing syscall slots.Gabe Black
2009-11-10Mem: Eliminate the NO_FAULT request flag.Gabe Black
2009-11-04build: fix compile problems pointed out by gcc 4.4Nathan Binkert
2009-10-30Syscalls: Make system calls access arguments like a stack, not an array.Gabe Black
2009-10-24syscall: Addition of an ioctl command code for Power.Timothy M. Jones
2009-10-17ISA: Fix compilation.Gabe Black
2009-09-22python: Move more code into m5.util allow SCons to use that code.Nathan Binkert
2009-09-17mips: fix command line argumentsKorey Sewell
2009-09-15Syscalls: Implement sysinfo() syscall.Vince Weaver
2009-07-31merge mips fix and statetrace changesKorey Sewell
2009-07-31mips: fix ll/sc pairs working incorrectly because of accidental clobber of LL...Korey Sewell
2009-07-30compile: fix accidental conversion of == into =Nathan Binkert
2009-07-22MIPS: Small fix I forgot to qrefresh into my last change.Gabe Black
2009-07-22MIPS: Style/formatting sweep of the decoder itself.Gabe Black
2009-07-21MIPS: Format the register index constants like the other ISAs.Gabe Black
2009-07-21MIPS: Get MIPS_FS to compile, more style fixes.Gabe Black
2009-07-21MIPS: Many style fixes.Gabe Black
2009-07-20MIPS: Use BitUnions instead of bits() functions and constants.Gabe Black
2009-07-10ISAs: Get rid of the IControl operand type.Gabe Black
2009-07-09MIPS: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Add a registers.hh file as an ISA switched header.Gabe Black