| Age | Commit message (Expand) | Author |
|---|
| 2019-05-21 | sim-se: change syscall function signature | Brandon Potter |
| 2019-05-20 | mips: Add an object file loader for linux. | Gabe Black |
| 2019-04-30 | arch: Stop using TheISA within the ISAs. | Gabe Black |
| 2019-04-29 | mips: Implement readRegOtherThread and setRegOtherThread directly. | Gabe Black |
| 2019-04-28 | arch, sim: Simplify the AuxVector type. | Gabe Black |
| 2019-04-28 | mem: Remove the ISA specialized versions of port proxy's read/write. | Gabe Black |
| 2019-04-03 | misc: Removed inconsistency in O3* debug msgs | Andrea Mondelli |
| 2019-02-12 | python: Don't assume SimObjects live in the global namespace | Andreas Sandberg |
| 2019-02-12 | arch-mips: Remove unused Python file | Andreas Sandberg |
| 2019-02-01 | cpu, arch: Replace the CCReg type with RegVal. | Gabe Black |
| 2019-01-31 | mips: Stop using architecture specific register types. | Gabe Black |
| 2019-01-31 | arch: cpu: Rename *FloatRegBits* to *FloatReg*. | Gabe Black |
| 2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
| 2019-01-24 | base: arch: Get rid of the now unused FloatRegVal type. | Gabe Black |
| 2019-01-22 | arch: cpu: Stop passing around misc registers by reference. | Gabe Black |
| 2019-01-22 | sim-se: add syscalls related to polling | Brandon Potter |
| 2019-01-16 | arch: Make the ISA register types aliases for the global types. | Gabe Black |
| 2018-12-20 | arch, cpu: Remove float type accessors. | Gabe Black |
| 2018-11-27 | arch, base, cpu, gpu, mem: Replace assert(0 or false with panic. | Gabe Black |
| 2018-11-06 | mips: Change the integer and fp register widths to be 64 bits. | Gabe Black |
| 2018-11-06 | mips: Clean up type overrides for operands. | Gabe Black |
| 2018-11-06 | mips: Explicitly truncate the syscall return value down to 32 bits. | Gabe Black |
| 2018-10-17 | arch: Get rid of the unused type AnyReg. | Gabe Black |
| 2018-10-12 | mips: Use little endian packet accessors. | Gabe Black |
| 2018-09-19 | syscall_emul: expand AuxVector class | Brandon Potter |
| 2018-06-11 | misc: Using smart pointers for memory Requests | Giacomo Travaglini |
| 2018-06-11 | misc: Substitute pointer to Request with aliased RequestPtr | Giacomo Travaglini |
| 2018-03-26 | arch: Fix all override related warnings. | Gabe Black |
| 2018-03-26 | arch: Add a virtual asBytes function to the StaticInst class. | Gabe Black |
| 2018-01-20 | arch, mem: Make the page table lookup function return a pointer. | Gabe Black |
| 2018-01-20 | sim, arch, base: Refactor the base remote GDB class. | Gabe Black |
| 2018-01-19 | arch, mem, sim: Consolidate and rename the SE mode page table classes. | Gabe Black |
| 2018-01-15 | arch: Fix a fatal_if in most of the arch's process classes. | Gabe Black |
| 2018-01-11 | arch,mem: Remove the default value for page size. | Gabe Black |
| 2018-01-11 | arch,mem: Move page table construction into the arch classes. | Gabe Black |
| 2018-01-10 | style: change C/C++ source permissions to noexec | BKP |
| 2018-01-10 | alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT. | Gabe Black |
| 2017-12-23 | alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst. | Gabe Black |
| 2017-12-22 | arch,cpu: "virtualize" the TLB interface. | Gabe Black |
| 2017-12-13 | cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst. | Gabe Black |
| 2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-10-17 | scons: Stop generating inc.d in the isa parser. | Gabe Black |
| 2017-10-13 | mem: Signal the local monitor when clearing the global monitor | Nikos Nikoleris |
| 2017-09-11 | stats: Get rid of some kernel stats related cruft. | Gabe Black |
| 2017-07-12 | mips, x86: Refactor some Event subclasses into lambdas | Sean Wilson |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
