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path: root/src/arch/sparc/isa.cc
AgeCommit message (Expand)Author
2018-02-24sparc: Fix FS Checkpoint loadingKhalique
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2013-01-04Decoder: Remove the thread context get/set from the decoder.Gabe Black
2013-01-04SPARC: Keep a copy of the current ASI in the decoder.Gabe Black
2012-02-11SPARC: Make PSTATE and HPSTATE a BitUnion.Gabe Black
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-10-09[mq]: sefssparcregfile.patchGabe Black
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2010-11-11SPARC: Clean up some historical style issues.Gabe Black
2010-10-10SPARC: Make SPARC's ISA's clear function initialize everything it should.Gabe Black
2009-07-10SPARC: Set up a lookup table for integer register flattening.Gabe Black
2009-07-09SPARC: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black