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path: root/src/arch/sparc
AgeCommit message (Expand)Author
2019-01-22sparc: Get rid of some register type definitions.Gabe Black
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-22sim-se: add syscalls related to pollingBrandon Potter
2019-01-16arch: Make the ISA register types aliases for the global types.Gabe Black
2019-01-10sim-se: Refactor clone to avoid most ifdefsAndreas Sandberg
2018-11-05sparc: Switch the FloatReg and FloatRegBits types to be 64 bit.Gabe Black
2018-10-17arch: Get rid of the unused type AnyReg.Gabe Black
2018-10-12sparc: Use big endian packet accessors.Gabe Black
2018-09-19syscall_emul: expand AuxVector classBrandon Potter
2018-06-11misc: Using smart pointers for memory RequestsGiacomo Travaglini
2018-03-27sparc: Add some missing M5_FALLTHROUGHs and breaks.Gabe Black
2018-03-26arch: Fix all override related warnings.Gabe Black
2018-03-26arch: Add a virtual asBytes function to the StaticInst class.Gabe Black
2018-03-08sparc: Passify a new g++ warning.Gabe Black
2018-02-24sparc: Fix FS Checkpoint loadingKhalique
2018-02-13sim: Make Stats truly non-copy-constructibleRekai Gonzalez-Alberquilla
2018-01-23tarch, mem: Abstract the data stored in the SE page tables.Gabe Black
2018-01-20arch, mem: Make the page table lookup function return a pointer.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black
2018-01-15arch: Fix a fatal_if in most of the arch's process classes.Gabe Black
2018-01-11arch,mem: Remove the default value for page size.Gabe Black
2018-01-11arch,mem: Move page table construction into the arch classes.Gabe Black
2018-01-10alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.Gabe Black
2017-12-23alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
2017-12-13cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-22sparc: Move integer StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Move the mem base classes out of the ISA description.Gabe Black
2017-11-22sparc: Move the microop/macroop base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Return debug faults from unimplemented instructions.Gabe Black
2017-11-22sparc: Pull the unimplemented formats out of the ISA description.Gabe Black
2017-11-22sparc: Pull the "Uknown" StaticInst class out of the ISA description.Gabe Black
2017-11-22sparc: Pull most of the Nop format out of the ISA description.Gabe Black
2017-11-22sparc: Pull more StaticInst base classes out of the ISA desc.Gabe Black
2017-11-22sparc: Pull flat static instruction classes out of the ISA.Gabe Black
2017-11-20sparc: Pull StaticInst base classes out of the ISA description.Gabe Black
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-08-30arch-sparc: Add a FaultVals instantiation for VecDisabledAndreas Sandberg
2017-07-05arch: ISA parser additions of vector registersRekai Gonzalez-Alberquilla
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-05-19base, sim, arch: Fix clang 5.0 warningsAndreas Sandberg