gem5 - gem5

Age	Commit message (Expand)	Author
2017-07-05	cpu: Simplify the rename interface and use RegId	Rekai Gonzalez-Alberquilla
2017-07-05	arch, cpu: Architectural Register structural indexing	Nathanael Premillieu
2016-02-06	x86: revamp cmpxchg8b/cmpxchg16b implementation	Alexandru Dutu
2014-10-16	arch,x86,mem: Dynamically determine the ISA for Ruby store check	Andreas Hansson
2012-04-15	X86: Fix a tiny typo in the load/store microop constructor.	Gabe Black
2011-07-02	ISA: Use readBytes/writeBytes for all instruction level memory operations.	Gabe Black
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2010-08-23	X86: Consolidate extra microop flags into one parameter.	Gabe Black
2010-05-23	copyright: Change HP copyright on x86 code to be more friendly	Nathan Binkert
2009-08-21	X86: fix some simple compile issues	Nathan Binkert
2009-07-16	X86: Take limitted advantage of the compilers type checking for microop opera...	Gabe Black
2009-04-23	X86: Put the StoreCheck flag with the others, and don't collide with other fl...	Gabe Black
2009-02-27	X86: Fix segment limit checks.	Gabe Black
2009-02-25	X86: Add a flag to force memory accesses to happen at CPL 0.	Gabe Black
2008-11-09	X86: Fix completeAcc get call.	Gabe Black
2007-08-26	X86: Remove x86 code that attempted to fix misaligned accesses.	Gabe Black
2007-08-04	X86: Make 64 bit unaligned accesses work as well as the other sizes.	Gabe Black
2007-07-30	X86: Make disassembly use the final register index. Add bits to indicate whet...	Gabe Black
2007-07-26	X86: Add functions to read and write to an exec context.	Gabe Black
2007-07-14	Pull some hard coded base classes out of the isa description.	Gabe Black