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path: root/src/cpu/o3/cpu.cc
AgeCommit message (Expand)Author
2019-05-18arch, base, cpu, dev, mem, sim: Remove #if 0-ed out code.Gabe Black
2019-04-30cpu: alpha: Delete all occurrances of the simPalCheck function.Gabe Black
2019-04-30cpu: Remove hwrei from the generic interfaces.Gabe Black
2019-04-30arch: cpu: Track kernel stats using the base ISA agnostic type.Gabe Black
2019-04-03misc: Removed inconsistency in O3* debug msgsAndrea Mondelli
2019-03-28cpu: Added a probe to notify the address of retired instructionsJavier Bueno
2019-02-08sim,cpu: make exit_group halt all threads in a groupTuan Ta
2019-02-08cpu: fixed how O3 CPU executes an exit system callTuan Ta
2019-02-01cpu, arch: Replace the CCReg type with RegVal.Gabe Black
2019-01-31arch: cpu: Rename *FloatRegBits* to *FloatReg*.Gabe Black
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-25cpu, arch, arch-arm: Wire unused VecElem code in the O3 modelGiacomo Travaglini
2019-01-25cpu: Fix VecElemClass bugs in cpu modelsGiacomo Travaglini
2019-01-24cpu-o3: O3 LSQ GeneralisationRekai Gonzalez-Alberquilla
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2019-01-16cpu: dev: sim: gpu-compute: Banish some ISA specific register types.Gabe Black
2019-01-15cpu: Fix usage of setArchVecElemGiacomo Travaglini
2018-12-20arch, cpu: Remove float type accessors.Gabe Black
2018-11-16cpu: Fix the usage of const DynInstPtrRekai Gonzalez-Alberquilla
2017-11-21cpu, cpu, sim: move Cycle probe updateJose Marinho
2017-11-20pwr: Adds logic to enter power gating for the cpu modelAnouk Van Laer
2017-07-17cpu,o3: Fixed checkpointing bug occuring in the o3 CPUAnouk Van Laer
2017-07-12cpu: Refactor some Event subclasses to lambdasSean Wilson
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05cpu: Physical register structural + flat indexingNathanael Premillieu
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2015-07-20syscall_emul: [patch 13/22] add system call retry capabilityBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-09-13sim: Refactor quiesce and remove FS assertsMichael LeBeane
2016-06-06pwr: Low-power idle power state for idle CPUsDavid Guillen Fandos
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2014-12-09power: Low-power idle power state for idle CPUsAkash Bagdia
2015-12-31mem: Make cache terminology easier to understandAndreas Hansson
2015-12-07probe: Add probe in Fetch, IEW, Rename and CommitRadhika Jagtap
2015-11-22cpu: Fix base FP and CC register index in o3 insertThread()Nathanael Premillieu
2015-09-30cpu,isa,mem: Add per-thread wakeup logicMitch Hayenga
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-30cpu: Add per-thread monitorsMitch Hayenga
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Make the drain state a global typed enumAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-05-05mem: Snoop into caches on uncacheable accessesAndreas Hansson
2015-04-03cpu: fix system total instructions accountingNikos Nikoleris
2015-03-02mem: Split port retry for all different packet classesAndreas Hansson
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2015-02-06cpu: Idle CPU status logic revisedAlexandru Dutu
2014-11-06x86 isa: This patch attempts an implementation at mwait.Marc Orr