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path: root/src/cpu/o3/lsq_unit.hh
AgeCommit message (Expand)Author
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-08-11params: Convert the CPU objects to use the auto generated param structs.Nathan Binkert
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
2008-02-06Make the Event::description() a const functionStephen Hines
2007-06-30Make CPU models use new LoadLockedReq/StoreCondReq commands.Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-04-21fixes for solaris compileAli Saidi
2007-04-04Merge zizzer.eecs.umich.edu:/bk/newmemGabe Black
2007-04-04Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU f...Kevin Lim
2007-04-03Made the "data" field of store queue entries into a character array. It's siz...Gabe Black
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-23Two fixes:Kevin Lim
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
2007-01-03Merge zizzer:/bk/newmemGabe Black
2006-12-26Remove some #if FULL_SYSTEMs so MP stuff works even in SE mode.Kevin Lim
2006-12-16Switch the endianness of data that's forwarded. This is the same sort of prob...Gabe Black
2006-10-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-23Add in support for LL/SC in the O3 CPU. Needs to be fully tested.Kevin Lim
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-19refactor code for the packet, get rid of packet_impl.hhNathan Binkert
2006-10-09Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-10-09Be sure to delete packet and sender state if the cache is blocked.Kevin Lim
2006-10-08Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable().Steve Reinhardt
2006-10-08Updates to O3 CPU. It should now work in FS mode, although sampling still ha...Kevin Lim
2006-10-02Updates to fix merge issues and bring almost everything up to working speed. ...Kevin Lim
2006-09-30Merge ktlim@zamp:./local/clean/o3-merge/m5Kevin Lim
2006-08-16Fixes for Kevins O3 model to work with the blocking caches.Ron Dreslinski
2006-07-19O3CPU fixes.Kevin Lim
2006-07-13Move Dcache port creation from LSQUnit to LSQ in order to support Ron's recen...Kevin Lim
2006-07-07Support Ron's changes for hooking up ports.Kevin Lim
2006-06-27Make full CPU handle SE faultsAli Saidi
2006-06-22Misc fixes.Kevin Lim
2006-06-16Two updates that got combined into one ChangeSet accidentally. They're both ...Kevin Lim
2006-06-14Minor code cleanup of BaseDynInst.Kevin Lim
2006-06-13Minor updates for stats.Kevin Lim
2006-06-09Removing of old code and adding in new comments.Kevin Lim
2006-06-09Fixes for some outstanding issues in the LSQ. It should now be able to retry...Kevin Lim
2006-06-07Update copyright.Kevin Lim
2006-06-05Fixes to get new CPU model working for simple test case. The CPU does not ye...Kevin Lim
2006-06-04Merge ktlim@zamp:/z/ktlim2/clean/m5-o3Kevin Lim
2006-06-02Fixes to get compiling to work. This is mainly fixing up some includes; chan...Kevin Lim
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