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cpu
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traffic_gen
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traffic_gen.cc
Age
Commit message (
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Author
2017-12-19
cpu-tester: Added ExitGen to TrafficGen
Riken Gohil
2017-06-20
cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper
Sean Wilson
2016-06-20
mem: Resolve TrafficGen trace relative to the config
Andreas Sandberg
2016-06-06
sim: Call regStats of base-class as well
Stephan Diestelhorst
2016-05-26
cpu: Add a basic progress check to the TrafficGen
Andreas Hansson
2016-03-20
cpu: warn if TrafficGen is suppressing a large numer of packets
Andreas Hansson
2015-11-22
cpu: Fix memory leak in traffic generator
Andreas Hansson
2015-07-07
sim: Refactor and simplify the drain API
Andreas Sandberg
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2015-03-19
cpu: Fix TrafficGen message format
Wendy Elsasser
2015-03-02
mem: Split port retry for all different packet classes
Andreas Hansson
2014-09-20
cpu: Update DRAM traffic gen
Wendy Elsasser
2014-09-09
misc: Fix a number of unitialised variables and members
Andreas Hansson
2014-09-03
base: Use the global Mersenne twister throughout
Andreas Hansson
2014-08-10
cpu: Ensure the traffic generator suppresses non-memory packets
Andreas Hansson
2014-03-23
cpu: DRAM Traffic Generator
Neha Agarwal
2014-03-23
cpu: Add basic check to TrafficGen initial state
Stan Czerniawski
2014-01-29
cpu: fix bug when TrafficGen deschedules event
Xiangyu Dong
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-05-30
cpu: Check that minimum TrafficGen period is less than max period
Sascha Bischoff
2013-05-30
cpu: Fix bug when reading in TrafficGen state transitions
Sascha Bischoff
2013-05-30
cpu: Add request elasticity to the traffic generator
Andreas Hansson
2013-05-30
cpu: Block traffic generator when requests have to retry
Andreas Hansson
2013-05-30
cpu: Move traffic generator sending out of generator states
Andreas Hansson
2013-05-30
cpu: Fold together the StateGraph and the TrafficGen
Andreas Hansson
2013-04-22
cpu: Make the generators usable outside the TrafficGen module
Andreas Hansson
2013-03-12
cpu: Fix state transition bug in the traffic generator
Andreas Sandberg
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-01-07
cpu: Share the send functionality between traffic generators
Andreas Hansson
2013-01-07
cpu: Add support for protobuf input for the trace generator
Andreas Hansson
2013-01-07
cpu: Encapsulate traffic generator input in a stream
Andreas Hansson
2013-01-07
cpu: Fix the traffic gen read percentage
Andreas Hansson
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-09-21
TrafficGen: Add a basic traffic generator
Andreas Hansson