gem5 - gem5

Age	Commit message (Expand)	Author
2018-12-07	mem-cache: Workaround for setWhenReady assertion	Daniel R. Carvalho
2018-12-04	mem-cache: Add getter and setter to CacheBlk::whenReady	Daniel R. Carvalho
2018-11-26	mem-cache: Add setters to validate and secure block	Daniel R. Carvalho
2018-10-11	mem-cache: Rename blk.cc/hh to cache_blk.cc/hh	Daniel R. Carvalho
2008-02-10	Rename cache files for brevity and consistency with rest of tree.	Steve Reinhardt
2008-01-02	Additional comments and helper functions for PrintReq.	Steve Reinhardt
2008-01-02	Add functional PrintReq command for memory-system debugging.	Steve Reinhardt
2007-06-17	More major reorg of cache. Seems to work for atomic mode now,	Steve Reinhardt
2007-03-06	Move all of the parameters of the Root SimObject so they are	Nathan Binkert
2007-02-12	rename store conditional stuff as extra data so it can be used for conditiona...	Ali Saidi
2006-10-19	First cut at LL/SC support in caches (atomic mode only).	Steve Reinhardt
2006-10-14	Get rid of unused CacheBlk << output operator.	Steve Reinhardt
2006-08-11	#include of iostream needed.	Gabe Black
2006-06-28	More Changes, working towards cache.cc compiling. Headers cleaned up.	Ron Dreslinski
2006-06-28	Backing in more changsets, getting closer to compile	Ron Dreslinski
2006-06-28	Was having difficulty with merging the cache, reverted to an early version an...	Ron Dreslinski