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Age
Commit message (
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Author
2013-09-04
alpha: Move system virtProxy to Alpha only
Andreas Hansson
2013-08-19
power: Add voltage domains to the clock domains
Akash Bagdia
2013-08-07
x86: add tlb checkpointing
Nilay Vaish
2013-07-18
mem: Set the cache line size on a system level
Andreas Hansson
2013-06-27
sim: Add the notion of clock domains to all ClockedObjects
Akash Bagdia
2013-06-27
config: Add a system clock command-line option
Akash Bagdia
2013-06-11
sim: Revert [34e3295b0e39] (sim: Fix early termination in mult...)
Andreas Sandberg
2013-06-03
arch: Create a method to finalize physical addresses
Andreas Sandberg
2013-06-03
sim: Add debug output when executing pseudo-instructions
Andreas Sandberg
2013-05-02
sim: Add support for m5fail in pseudoInst()
Andreas Sandberg
2013-04-22
sim: Add a helper function to execute pseudo instructions
Andreas Sandberg
2013-04-22
sim: separate nextCycle() and clockEdge() in clockedObjects
Dam Sunwoo
2013-04-22
sim: Add helper functions that add PCEvents with custom arguments
Andreas Sandberg
2013-04-17
base: load weak symbols from object file
Deyuan Guo ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2013-03-02
sim: remove duplicate check on stack size
Nilay Vaish
2013-02-19
scons: Add warning for missing declarations
Andreas Hansson
2013-02-19
scons: Fix up numerous warnings about name shadowing
Andreas Hansson
2013-02-19
sim: Make clock private and access using clockPeriod()
Andreas Hansson
2013-02-15
sim: Add a system-global option to bypass caches
Andreas Sandberg
2013-01-31
sim: remove unused struct priority_compare
Nilay Vaish
2013-01-08
util: add m5_fail op.
LluĂs Vilanova
2013-01-08
sim: Fix early termination in multi-core simulation under SE mode.
Tao Zhang
2013-01-08
arm: add access syscall for ARM SE mode
Mitch Hayenga
2013-01-07
stats: Fix swig wrapping for Tick in stats
Sascha Bischoff
2013-01-07
sim: Remove unused variables
Andreas Sandberg
2013-01-07
arm: Remove the register mapping hack used when copying TCs
Andreas Sandberg
2013-01-07
arch: Move the ISA object to a separate section
Andreas Sandberg
2013-01-07
arch: Add support for invalidating TLBs when draining
Andreas Sandberg
2013-01-07
sim: Fatal if a clocked object is set to have a clock of 0
Andreas Hansson
2013-01-07
config: Do not use hardcoded physmem in fs script
Andreas Hansson
2013-01-07
base: Add wrapped protobuf output streams
Andreas Hansson
2013-01-04
SPARC: Keep a copy of the current ASI in the decoder.
Gabe Black
2012-11-16
sim: have a curTick per eventq
Nilay Vaish
2012-11-02
sim: Add drain methods to request additional cleanup operations
Andreas Sandberg
2012-11-02
sim: Move the draining interface into a separate base class
Andreas Sandberg
2012-11-02
sim: Include object header files in SWIG interfaces
Andreas Sandberg
2012-11-02
ARM: dump stats and process info on context switches
Dam Sunwoo
2012-11-02
sim: Fix as issue where exit events on instr queues are used after freed.
Ali Saidi
2012-10-25
dev: Make default clock more reasonable for system and devices
Andreas Hansson
2012-10-15
ruby: reset timing after cache warm up
Nilay Vaish
2012-10-15
Port: Add protocol-agnostic ports in the port hierarchy
Andreas Hansson
2012-10-15
Mem: Separate the host and guest views of memory backing store
Andreas Hansson
2012-10-15
Checkpoint: Make system serialize call children
Andreas Hansson
2012-10-15
Clock: Inherit the clock from parent by default
Andreas Hansson
2012-09-25
Statistics: Add a function to configure periodic stats dumping
Sascha Bischoff
2012-09-25
ARM: Squash outstanding walks when instructions are squashed.
Ali Saidi
2012-09-25
sim: Move CPU-specific methods from SimObject to the BaseCPU class
Andreas Sandberg
2012-09-25
sim: Remove SimObject::setMemoryMode
Andreas Sandberg
2012-09-21
SE: Ignore FUTEX_PRIVATE_FLAG of sys_futex
Lluc Alvarez
2012-09-10
NetBSD: Build on NetBSD
Palle Lyckegaard
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