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path: root/src/sim
AgeCommit message (Expand)Author
2019-01-10sim-se, arch-arm: Add support for getdents64Javier Setoain
2019-01-10sim-se: Refactor clone to avoid most ifdefsAndreas Sandberg
2019-01-10sim-se: Correctly calculate next PC in cloneAndreas Sandberg
2019-01-10sim-se: Use CONFIG_CLONE_BACKWARDS for ArmAndreas Sandberg
2018-12-05arch-x86: Add sys/syscall.h to x86 process.cc/syscall_emul.ccTony Gutierrez
2018-12-04base, sim: Add missing destructorsNikos Nikoleris
2018-11-27sim-se: only implement getdentsFunc on supported hostsCiro Santilli
2018-11-20sim: Deschedule existing events when destructing an event queue.Gabe Black
2018-11-14sim: Move BitUnion overloading to show/parseParamsGiacomo Travaglini
2018-11-14sim: Move paramIn/Out definition to header fileGiacomo Travaglini
2018-11-12sim: Push the global frequency management code into C++.Gabe Black
2018-10-30syscall_emul: fix openat when directory does not end in "/"Ciro Santilli
2018-10-01sim: Extend (UN)SERIALIZE_ARRAY to BitUnionsGiacomo Travaglini
2018-09-19syscall_emul: implement dir-related syscallsBrandon Potter
2018-09-19syscall_emul: refactor FDEntry and children classesBrandon Potter
2018-09-19syscall_emul: style changes and FDArray refactorBrandon Potter
2018-09-19syscall_emul: expand AuxVector classBrandon Potter
2018-09-14power: Add a clock_period variable to power expressionsSherif Elhabbal
2018-09-11base: Correct a small typo in sim/core.(hh|cc).Gabe Black
2018-09-07sim: Add System method for MasterID lookupGiacomo Travaglini
2018-06-25syscall_emul: adding symlink system callMatt Sinclair
2018-06-25syscall_emul: adding link system callMatt Sinclair
2018-05-30dev: Exit correctly in dist-gem5 for SE modeMichael LeBeane
2018-05-16style: fix amd license and style issuesTony Gutierrez
2018-05-09sim: Remove trailing dot when assigning a master's nameGiacomo Travaglini
2018-04-27sim,cpu,mem,arch: Introduced MasterInfo data structureGiacomo Travaglini
2018-04-20docs: Fix power model doxygenJason Lowe-Power
2018-03-15sim-se: Fix fallthrough in prlimitJason Lowe-Power
2018-02-28sim, power: Temperature used for power calculationsAnouk Van Laer
2018-02-28sim: Added model type to power modelAnouk Van Laer
2018-02-16sim: Add gtoh/htog helpers that take an explicit endiannessChuan Zhu
2018-02-09sim: Remove _numContexts member in System classGiacomo Travaglini
2018-01-29arm: DT autogeneration - Device Tree generation methodsGlenn Bergmans
2018-01-23tarch, mem: Abstract the data stored in the SE page tables.Gabe Black
2018-01-23x86, mem: Rewrite the multilevel page table class.Gabe Black
2018-01-20sim: Use the new BitUnion templates in serialize.hh.Gabe Black
2018-01-20base: Rework bitunions so they can be more flexible.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black
2018-01-16sim: Simplify registerThreadContext a little bit.Gabe Black
2018-01-11arch,mem: Move page table construction into the arch classes.Gabe Black
2018-01-10arch-riscv,sim: Support clone syscall in RISC-VTuan Ta
2018-01-05sim: Fix a bug in prlimit syscall in SE modeTuan Ta
2017-12-14misc: Updates for gcc7.2 for x86Jason Lowe-Power
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
2017-12-13base: Add endianness conversion functions for std::array types.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-27scons: Switch from "guards" to "tags" on source files.Gabe Black
2017-11-22sim-se: Add default to SyscallDesc constructorAlec Roelke
2017-11-21sim: Fix need to save address space info during serialization.Austin Harris