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AgeCommit message (Expand)Author
2020-01-22fastmodel: Implement CC reg accessors.Gabe Black
2020-01-22arm: Remove checkpointing from the ARM TLBs.Gabe Black
2020-01-22arch: Get rid of the unused (and mostly undefined) zeroRegisters.Gabe Black
2020-01-21dev-arm: add FixedClock SimObjectAdrian Herrera
2020-01-21mem-cache: Fix invalidation of prefetchersDaniel R. Carvalho
2020-01-20arch-arm: Fix EL2 target exception level for SP alignment fault.Jordi Vaquero
2020-01-17mem-cache: Add print function to ReplaceableEntryDaniel R. Carvalho
2020-01-17mem-cache: Add getter for the number of valid sub-blksDaniel R. Carvalho
2020-01-17mem-cache: Add multiple eviction statsDaniel R. Carvalho
2020-01-17mem-cache: Make findVictim non-constDaniel R. Carvalho
2020-01-17mem-cache: Add more compression statsDaniel R. Carvalho
2020-01-17mem-cache: Factor out multiple block evictionDaniel R. Carvalho
2020-01-15arch-arm: ELIsInHost, check VHE and SecEL2Adrian Herrera
2020-01-15arch-arm: Virtualization Host Extensions checkingAdrian Herrera
2020-01-14mem-garnet: Use smart pointers for CrossbarSwitch's membersDaniel R. Carvalho
2020-01-14x86: Stop clearing RAX for BIST in initCPU.Gabe Black
2020-01-14x86: Move local APIC initialization out of initCPU.Gabe Black
2020-01-14x86: Move miscreg initialization to the ISA class.Gabe Black
2020-01-13sim: Add a dumpSimcall mechanism to GuestABI.Gabe Black
2020-01-13sim: Add a unit test for the GuestABI mechanism.Gabe Black
2020-01-13sim: Implement a varargs like mechanism for GuestABI system.Gabe Black
2020-01-13systemc: keep SC_CONCAT* macroEarl Ou
2020-01-11arch: Make the generic micropc enabled PCState set nupc to 1.Gabe Black
2020-01-10dev-arm: VExpress_GEM5_Base, fix daughterboard referenceAdrian Herrera
2020-01-09tests,base: Added GTest for base/socket.ccBobby R. Bruce
2020-01-09tests: Updated gtest/logging.cc to print log rather than fail.Bobby R. Bruce
2020-01-09base: Include some required headers in amo.hh.Gabe Black
2020-01-09base, gpu-compute: Move gpu AMOs into the generic headerGiacomo Travaglini
2020-01-08arch, base: Move arm AtomicOpFunctor into the generic headerGiacomo Travaglini
2020-01-08base: Move AtomicOpFunctors to a dedicated headerGiacomo Travaglini
2020-01-07arch,sim: Promote the m5ops_base param to the System base class.Gabe Black
2020-01-07cpu: Disable O3CPU value forwarding with write strobesGabor Dozsa
2020-01-07cpu: Use enums for O3CPU store value forwardingGabor Dozsa
2020-01-07misc: Reflect changes of arm bootloader nameAdrian Herrera
2020-01-07mem-cache: Forward snoops when the cache is not respondingNikos Nikoleris
2020-01-07mem-cache: Ensure that responses get data from the right sourceNikos Nikoleris
2020-01-07systemc: fix gem5_to_tlm bridgeEarl Ou
2020-01-07fastmodel: Implement the vecPredReg accessor functions.Gabe Black
2020-01-07arch,sim: Stop decoding the pseudo inst subfunc value.Gabe Black
2020-01-06arch,sim: Use the guest ABI mechanism with pseudo instructions.Gabe Black
2020-01-06arch-arm: Semihosting, specify files root dirAdrian Herrera
2020-01-06dev-arm: Fix SMMUv3 walkMasks in page table opsMichiel van Tol
2020-01-06dev-arm: Fix SMMUv3 16KB next-level table address maskingGiacomo Travaglini
2020-01-06dev-arm: GICv3, handle GICR_ICFGR0 WI behaviourAdrian Herrera
2020-01-06mem-cache: Avoid write merging if there are reads in betweenNikos Nikoleris
2020-01-03sim: Move destructor of Port to publicYu-hsin Wang
2020-01-03cpu: Fix issue with MinorCPU predicated-false mem. accessesGiacomo Gabrielli
2020-01-03cpu: Disable MinorCPU value forwarding with write strobesGabor Dozsa
2019-12-30fastmodel: Fix compilation errorsChun-Chen TK Hsu
2019-12-27fastmodel: Move ARM but not CortexA76 specific bits to the IRIS TC.Gabe Black