index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
Age
Commit message (
Expand
)
Author
2019-02-12
python: Update use of exec to work with Python 3
Andreas Sandberg
2019-02-12
python: Switch to using open instead of file
Andreas Sandberg
2019-02-12
mem-cache: Irregular Stream Buffer Prefetcher
Javier Bueno
2019-02-12
mem-cache: Added the Delta Correlating Prediction Tables Prefetcher
Javier Bueno
2019-02-12
python: Don't assume SimObjects live in the global namespace
Andreas Sandberg
2019-02-12
arch-mips: Remove unused Python file
Andreas Sandberg
2019-02-12
python: Make exception handling Python 3 safe
Andreas Sandberg
2019-02-12
python: Fix native module initialisation on Python 3
Andreas Sandberg
2019-02-12
mem-ruby: Fixing Topology
Pouya Fotouhi
2019-02-12
mem-ruby: Fixing MESI Three Level
Pouya Fotouhi
2019-02-11
systemc: Change the type of a loop counter to avoid a warning.
Gabe Black
2019-02-11
scons: Change an = to a += when accumulating sources from filters.
Gabe Black
2019-02-11
systemc: scons: Specify RPATH as a list.
Gabe Black
2019-02-08
cpu: Proposal for changing the indirect branch predictor interface
Jairo Balart
2019-02-08
riscv: fix AMO, LR and SC instructions
Tuan Ta
2019-02-08
cpu: support atomic memory request type with AtomicOpFunctor
Tuan Ta
2019-02-08
kern,sim: implement FUTEX_WAKE_OP
Moyang Wang
2019-02-08
sim, kern: support FUTEX_CMP_REQUEUE
Moyang Wang
2019-02-08
sim: handle the case when there're not enough HW thread contexts
Tuan Ta
2019-02-08
riscv: fixed syscall return value
Tuan Ta
2019-02-08
cpu: fix how branching is handled when a thread is suspended in MinorCPU
Tuan Ta
2019-02-08
cpu: stop scheduling suspended threads in all stages of MinorCPU
Tuan Ta
2019-02-08
riscv: ignore nanosleep syscall
Tuan Ta
2019-02-08
sim,cpu: make exit_group halt all threads in a group
Tuan Ta
2019-02-08
arch-riscv: initialize RISC-V's thread pointer register in clone syscall
Tuan Ta
2019-02-08
sim,kern: support FUTEX_WAIT_BITSET and FUTEX_WAKE_BITSET ops
Tuan Ta
2019-02-08
cpu: fixed how O3 CPU executes an exit system call
Tuan Ta
2019-02-08
arch-arm: Fix Virtual interrupts in AArch64
Giacomo Travaglini
2019-02-08
arch-arm: Fix extra comma in b7ce897f1e9545785bde982f72d04830c19d9a30
Giacomo Travaglini
2019-02-08
arch-arm: Allow ArmPPI usage for PMU
Giacomo Travaglini
2019-02-08
arch-arm: Fix initialization of PMU counters
Ruben Ayrapetyan
2019-02-07
configs, arch-arm: Using AddrRange for Realview mem_regions
Giacomo Travaglini
2019-02-07
arch-riscv: Enable support for riscv 32-bit in SE mode.
Austin Harris
2019-02-06
riscv: remove NonSpeculative flag from fence inst
Tuan Ta
2019-02-06
cpu: fix how a thread starts up in MinorCPU
Tuan Ta
2019-02-06
arch-riscv: Initialize interrupt mask
Tuan Ta
2019-02-06
scons: fix unused auto-generated blob variable in clang
Ciro Santilli
2019-02-06
sim: added missed macro definition on MacOS
Andrea Mondelli
2019-02-05
misc: added missing override specifier
Andrea Mondelli
2019-02-05
cpu: Made the Loop Predictor a SimObject
Javier Bueno
2019-02-05
cpu: Made TAGE a SimObject that can be used by other predictors
Jairo Balart
2019-02-05
riscv: Get rid of ISA specific register types in Interrupts.
Austin Harris
2019-02-01
mem-cache: Updated version of the Signature Path Prefetcher
Javier Bueno
2019-02-01
dev, arm: Removed contextId variable
Anouk Van Laer
2019-02-01
cpu, arch: Replace the CCReg type with RegVal.
Gabe Black
2019-01-31
python: Remove getCode() type workaround
Andreas Sandberg
2019-01-31
sim: Prepare C++ side for Python 3
Andreas Sandberg
2019-01-31
power: Get rid of some ISA specific register types.
Gabe Black
2019-01-31
null: Get rid of some register type definitions.
Gabe Black
2019-01-31
mips: Stop using architecture specific register types.
Gabe Black
[next]