| Age | Commit message (Expand) | Author |
|---|
| 2015-03-02 | mem: Add byte mask to Packet::checkFunctional | Andreas Hansson |
| 2015-03-02 | mem: Add option to force in-order insertion in PacketQueue | Stephan Diestelhorst |
| 2015-03-02 | mem: Downstream components consumes new crossbar delays | Marco Balboni |
| 2015-03-02 | mem: Move crossbar default latencies to subclasses | Andreas Hansson |
| 2015-03-02 | mem: Add crossbar latencies | Marco Balboni |
| 2015-03-02 | dev, arm: Clean up PL011 and rewrite interrupt handling | Andreas Sandberg |
| 2015-03-02 | arm: Share a port for the two table walker objects | Andreas Hansson |
| 2015-03-02 | arm: Remove unnecessary dependencies between AArch64 FP instructions | Giacomo Gabrielli |
| 2015-03-02 | cpu: o3 register renaming request handling improved | Rekai |
| 2015-03-02 | mem: Tidy up the cache debug messages | Andreas Hansson |
| 2015-03-02 | mem: Split port retry for all different packet classes | Andreas Hansson |
| 2015-03-02 | mem: Fix prefetchSquash + memInhibitAsserted bug | Ali Jafri |
| 2015-03-02 | cpu: Add a PC-value to the traffic generator requests | Stephan Diestelhorst |
| 2015-03-02 | arm: Don't truncate 16-bit ASIDs to 8 bits | Andreas Sandberg |
| 2015-03-02 | arm: Correctly access the stack pointer in GDB | Andreas Sandberg |
| 2015-03-02 | arm: Fix broken page table permissions checks in remote GDB | Andreas Sandberg |
| 2015-02-26 | Ruby: Update backing store option to propagate through to all RubyPorts | Jason Power |
| 2015-02-16 | cpu: TrafficGen sinks snoops without complaining | Andreas Hansson |
| 2015-02-16 | mem: Fix initial value problem with MemChecker | Stephan Diestelhorst |
| 2015-02-16 | dev: Fix undefined behaviuor in i8254xGBe | Andreas Hansson |
| 2015-02-16 | arm: Wire up the GIC with the platform in the base class | Andreas Sandberg |
| 2015-02-16 | mem: mmap the backing store with MAP_NORESERVE | Andreas Hansson |
| 2015-02-16 | mem: Use the range cache for lookup as well as access | Andreas Hansson |
| 2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
| 2015-02-16 | arm: Merge ISA files with pseudo instructions | Andreas Sandberg |
| 2015-02-16 | cpu: add support for outputing a protobuf formatted CPU trace | Ali Saidi |
| 2015-02-11 | mem: Clarification of packet crossbar timings | Marco Balboni |
| 2015-02-11 | mem: Clarify usage of latency in the cache | Marco Balboni |
| 2015-02-11 | cpu: Tidy up the MemTest and make false sharing more obvious | Andreas Hansson |
| 2015-02-11 | sim: Move the BaseTLB to src/arch/generic/ | Andreas Sandberg |
| 2015-02-11 | base: Add compiler macros to add deprecation warnings | Andreas Sandberg |
| 2015-02-11 | base: Do not dereference NULL in CompoundFlag creation | Andreas Hansson |
| 2015-02-11 | dev: Remove unused system pointer in the Platform base class | Andreas Sandberg |
| 2015-02-06 | cpu: Idle CPU status logic revised | Alexandru Dutu |
| 2015-02-03 | mem: Clarify express snoop behaviour | Andreas Hansson |
| 2015-02-03 | mem: Clarify cache behaviour for pending dirty responses | Andreas Hansson |
| 2015-02-03 | base: add an accessor and operators ==,!= to address ranges | Curtis Dunham |
| 2015-02-03 | base: Add XOR-based hashed address interleaving | Andreas Hansson |
| 2015-02-03 | config: Adjust DRAM channel interleaving defaults | Andreas Hansson |
| 2015-02-03 | sim: Remove test for non-NULL this in Event | Andreas Sandberg |
| 2015-02-03 | dev: Correctly clear interrupts in VirtIO PCI | Andreas Sandberg |
| 2014-12-19 | sim: prioritize async events; prevent starvation | Curtis Dunham |
| 2015-02-03 | cpu: Ensure timing CPU sinks response before sending new request | Andreas Hansson |
| 2015-02-03 | config: Fix typo in Float param | Geoffrey Blake |
| 2015-01-25 | arm: always set the IsFirstMicroop flag | Ali Saidi |
| 2015-01-25 | sim: Clean up InstRecord | Ali Saidi |
| 2015-01-25 | cpu: Remove all notion that we know when the cpu is misspeculating. | Ali Saidi |
| 2015-01-25 | cpu: Put all CPU instruction tracers in a single file | Ali Saidi |
| 2015-01-25 | cpu: remove legion tracer | Ali Saidi |
| 2014-12-23 | sim: fix reference counting of PythonEvent | Curtis Dunham |
