gem5 - gem5

Age	Commit message (Expand)	Author
2019-09-05	dev-arm: Implement invalidateASID in SMMUv3 WalkCache	Jan-Peter Larsson
2019-09-05	dev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache	Adrian Herrera
2019-09-05	arch-x86: implement movntq/movntdq instructions	Pouya Fotouhi
2019-09-04	cpu: reset byte_enable across writeMem calls	Ciro Santilli
2019-09-04	dev: Templatize PioPort.	Gabe Black
2019-09-03	ruby: Fix the way stall map size is checked for availability	Srikant Bharadwaj
2019-09-02	stats: Create HDF5 stat files relative to simout	Andreas Sandberg
2019-09-02	stats: Catch exceptions by const reference	Doğukan Korkmaztürk
2019-09-02	stats: Add support for listing available formats	Andreas Sandberg
2019-08-30	arm,kvm: Fix python imports from global namespace	Giacomo Travaglini
2019-08-29	mem-cache: Use SatCounter for RRPV	Daniel R. Carvalho
2019-08-29	base: Add function to saturate SatCounter	Daniel R. Carvalho
2019-08-29	stats: Add beta support for HDF5 stat dumps	Andreas Sandberg
2019-08-29	mem: Convert CommMonitor to the new stat framework	Andreas Sandberg
2019-08-29	cpu: Convert traffic gen to use new stats	Andreas Sandberg
2019-08-29	stats: Add support for partial stat dumps	Andreas Sandberg
2019-08-29	stats: Add support for hierarchical stats	Andreas Sandberg
2019-08-28	mem-ruby: Define BloomFilter namespace	Daniel R. Carvalho
2019-08-28	mem-ruby: Make H3 inherit from MultiBitSelBloomFilter	Daniel R. Carvalho
2019-08-28	mem-ruby: Finish implementing BloomFilter merge	Daniel R. Carvalho
2019-08-28	mem-ruby: Remove NonCountingBloomFilter	Daniel R. Carvalho
2019-08-28	mem-ruby: Make MultiGrainBloomFilter generic	Daniel R. Carvalho
2019-08-28	mem-ruby: Parameterize xor bits in BlockBloomFilter	Daniel R. Carvalho
2019-08-28	cpu: Make get(Data\|Inst)Port return a Port and not a MasterPort.	Gabe Black
2019-08-28	cpu, mem: Add new getSendFunctional method to the base CPU.	Gabe Black
2019-08-28	mem: Make PortProxy use a delegate for a sendFunctional function.	Gabe Black
2019-08-28	cpu: Move the instruction port into o3's fetch stage.	Gabe Black
2019-08-28	cpu: Move O3's data port into the LSQ.	Gabe Black
2019-08-28	mem: Eliminate the Base(Slave\|Master)Port classes.	Gabe Black
2019-08-27	cpu, dev, mem: Use the new Port methods.	Gabe Black
2019-08-27	sim: Add a << overload for the Port class which prints its name.	Gabe Black
2019-08-27	sim: Add a takeOverFrom method to the base Port class.	Gabe Black
2019-08-27	mem, sim, systemc: Reorganize Port and co.s bind, unbind slightly.	Gabe Black
2019-08-26	dev-arm: Fix GICv3 ITS indexing error	Giacomo Travaglini
2019-08-26	dev-arm: Fix GITS_BASER initialization/access	Giacomo Travaglini
2019-08-23	arch-riscv: fix GDB register cache	Alec Roelke
2019-08-23	mem: Put gem5 protocols in their own directory.	Gabe Black
2019-08-23	mem: Move ruby protocols into a directory called ruby_protocol.	Gabe Black
2019-08-23	mem: Split the various protocols out of the gem5 master/slave ports.	Gabe Black
2019-08-22	mem-ruby: fix build with PROTOCOL=MOESI_hammer	Ciro Santilli
2019-08-22	dev-arm: Start using GITS_CTLR.quiescent bit	Giacomo Travaglini
2019-08-22	dev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR/BASER)	Giacomo Travaglini
2019-08-22	dev-arm,system-arm: missing GICv3 ranges property	Adrian Herrera
2019-08-21	arch-riscv: Update register file	Yifei Liu
2019-08-21	arch-arm, cpu: fix ARM ubsan build on GCC 7.4.0	Ciro Santilli
2019-08-21	base: assert that stats bucket size is greater than 0	Ciro Santilli
2019-08-21	arch-arm: Fix implicit fallthrough build errors	Chun-Chen TK Hsu
2019-08-20	dev-arm: Add redistributor-stride property to GICv3	Giacomo Travaglini
2019-08-20	arch-arm: Replace occ of opModeToEL(currOpMode/cpsr) with currEL	Giacomo Travaglini
2019-08-20	arch-arm: Replace direct use cpsr.el with currEL helper	Giacomo Travaglini