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AgeCommit message (Expand)Author
2012-01-11Ruby: Resurrect Cache Warmup CapabilityNilay Vaish
2012-01-11Ruby Debug Flags: Remove one, add anotherNilay Vaish
2012-01-11Ruby Port: Add a list of cpu ports attached to this portNilay Vaish
2012-01-11Ruby EventQueue: Remove unused functionsNilay Vaish
2012-01-11Ruby Sparse Memory: Add function for collating blocksNilay Vaish
2012-01-11Ruby: Add infrastructure for recording cache contentsNilay Vaish
2012-01-11Ruby Memory Vector: Functions for collating and populating pagesNilay Vaish
2012-01-10Ruby: remove the files related to the tracerNilay Vaish
2012-01-10MOESI Hammer: Remove a couple of bugsNilay Vaish
2012-01-10Sparse Memory: Simplify the structure for an entryNilay Vaish
2012-01-10Automated merge with ssh://repo.gem5.org/gem5Ali Saidi
2012-01-10config: Fix json output for Python lt 2.6.Ali Saidi
2012-01-10DPRINTF: Improve some dprintf messages.Nilay Vaish
2012-01-09X86: Add memory fence to I/O instructionsNilay Vaish
2012-01-09CPU: Remove Alpha-specific PC alignment check.Anders Handler
2012-01-09Config: Fix issue with JSON outputAli Saidi
2012-01-09Packet: Add derived class FunctionalPacket to enable partial functional readsGeoffrey Blake
2012-01-09stats: fix Vector2d to display stats correctly when y_subname is not specified.Dam Sunwoo
2012-01-09sim: Enable sampling of run-time for code-sections marked using pseudo insts.Prakash Ramrakhyani
2012-01-09O3: Remove some asserts that no longer seem to be valid.Ali Saidi
2012-01-09config: support outputing a pickle of the configuration treeAli Saidi
2012-01-09mem: Change DPRINTF prints more useful destination port number.Min Kyu Jeong
2012-01-09O3: Add support of function tracing with O3 CPU.Ali Saidi
2012-01-09ARM: Add support for running multiple systemsAli Saidi
2012-01-09ARM: Add support for initparam m5 opAli Saidi
2012-01-09Base: Fixed shift amount in genrand() to work with large numbersDam Sunwoo
2012-01-09SWIG: Make gem5 compile and link with swig 2.0.4Andreas Hansson
2012-01-09MAC: Make gem5 compile and run on MacOSX 10.7.2Andreas Hansson
2012-01-07Ruby Cache: Add param for marking caches as instruction onlyNilay Vaish
2012-01-06AbstractController: Remove some of the unused functionsNilay Vaish
2012-01-06Ruby Set: Move NUMBER_WORDS_PER_SET to Set.hhNilay Vaish
2012-01-05eventq: add a function for replacing head of the queueNilay Vaish
2012-01-05MESI Coherence Protocol: Fix L2 miss statisticsNilay Vaish
2012-01-05X86 TLB: Move a DPRINTF to its correct placeNilay Vaish
2011-12-31Ruby: Shuffle some of the included filesNilay Vaish
2011-12-31SLICC: Use pointers for directory entriesNilay Vaish
2011-12-15IO: Fix bug in DMA Device where receiving a snoop on DMA port would cause a p...Ali Saidi
2011-12-13gcc: fix unused variable warnings from GCC 4.6.1Nathan Binkert
2011-12-01Trace: FIx issue with creation of trace file with output dir overhaul.Ali Saidi
2011-12-01MOESI_hammer: fixed L2 to L1 infinite stalls and deadlockBrad Beckmann
2011-12-01physmem: Improved fatal message for size mismatchBrad Beckmann
2011-12-01VNC: Add support for capturing frame buffer to file each time it is changed.Chris Emmons
2011-12-01Output: Add hierarchical output support and cleanup existing codebase.Chris Emmons
2011-12-01SE: Don't warn when not extending stack as it's too noisy with O3.Ali Saidi
2011-12-01O3: Remove hardcoded tgts_per_mshr in O3CPU.py.Chander Sudanthi
2011-12-01Device: Make changes necessary to support a coherent page walker cache.Mitchell Hayenga
2011-12-01ARM: Add support for having a TLB cache.Ali Saidi
2011-12-01ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .Ali Saidi
2011-12-01O3: Add stat that counts how many cycles the O3 cpu was quiesced.Ali Saidi
2011-12-01X86: Fix a bad segmentation check for the stack segment.Gabe Black