gem5 - gem5

Age	Commit message (Expand)	Author
2018-05-31	mem-cache: Add a non-coherent cache	Nikos Nikoleris
2018-03-20	arch-arm, configs: Treat the bootloader rom as cacheable memory	Nikos Nikoleris
2017-06-13	tests: Add ARM MOESI_CMP_directory regressions	Nikos Nikoleris
2016-10-14	config: Make configs/common a Python package	Andreas Hansson
2016-08-12	mem: Add snoop filter to SystemXBar by default	Andreas Hansson
2016-05-27	mem, config: Selective use of snoop filter	Stephan Diestelhorst
2015-10-05	tests: Update SMT tests to correctly configure CPUs	Andreas Sandberg
2015-07-03	mem: Allow read-only caches and check compliance	Andreas Hansson
2015-03-02	mem: Move crossbar default latencies to subclasses	Andreas Hansson
2014-10-29	arm, tests: Update config files to more recent kernels and create 64-bit regr...	Ali Saidi
2014-09-20	mem: Rename Bus to XBar to better reflect its behaviour	Andreas Hansson
2013-08-19	mem: Change AbstractMemory defaults to match the common case	Andreas Hansson
2013-08-19	power: Add voltage domains to the clock domains	Akash Bagdia
2013-08-19	config: Move the memory instantiation outside FSConfig	Andreas Hansson
2013-06-27	sim: Add the notion of clock domains to all ClockedObjects	Akash Bagdia
2013-06-27	config: Add a BaseSESystem builder for re-use in regressions	Andreas Hansson
2013-06-27	config: Add a system clock command-line option	Akash Bagdia
2013-06-27	config: Remove redundant explicit setting of default clocks	Akash Bagdia
2013-04-23	x86: regressions: add switcher full test	Nilay Vaish
2013-04-22	tests: Add support for testing KVM-based CPUs	Andreas Sandberg
2013-01-07	tests: Add CPU switching tests	Andreas Sandberg
2013-01-07	config: Do not use hardcoded physmem in fs script	Andreas Hansson
2013-01-07	tests: Create base classes to encapsulate common test configurations	Andreas Sandberg