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author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /arch/arm/include/asm/arch-am33xx/spl.h | |
download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz |
import the U-Boot code and make it compile
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/spl.h')
-rw-r--r-- | arch/arm/include/asm/arch-am33xx/spl.h | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/spl.h b/arch/arm/include/asm/arch-am33xx/spl.h new file mode 100644 index 0000000..f3910c2 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/spl.h @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2012 + * Texas Instruments, <www.ti.com> + */ +#ifndef _ASM_ARCH_SPL_H_ +#define _ASM_ARCH_SPL_H_ + +#define BOOT_DEVICE_NONE 0x00 +#define BOOT_DEVICE_MMC2_2 0xFF + +#if defined(CONFIG_TI814X) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_NAND_I2C 0x06 +#define BOOT_DEVICE_MMC2 0x08 /* ROM only supports 2nd instance. */ +#define BOOT_DEVICE_MMC1 0x09 +#define BOOT_DEVICE_SPI 0x15 +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x44 +#define BOOT_DEVICE_CPGMAC 0x46 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 +#elif defined(CONFIG_TI816X) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x03 +#define BOOT_DEVICE_ONENAND 0x04 +#define BOOT_DEVICE_MMC2 0x05 /* ROM only supports 2nd instance. */ +#define BOOT_DEVICE_MMC1 0x06 +#define BOOT_DEVICE_UART 0x43 +#define BOOT_DEVICE_USB 0x45 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC2 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC1 +#elif defined(CONFIG_AM33XX) +#define BOOT_DEVICE_XIP 0x01 +#define BOOT_DEVICE_XIPWAIT 0x02 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_NAND_I2C 0x06 +#define BOOT_DEVICE_MMC1 0x08 +#define BOOT_DEVICE_MMC2 0x09 +#define BOOT_DEVICE_SPI 0x0B +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x44 +#define BOOT_DEVICE_CPGMAC 0x46 +#define BOOT_DEVICE_ONENAND 0xFF /* ROM does not support OneNAND. */ + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#elif defined(CONFIG_AM43XX) +#define BOOT_DEVICE_NOR 0x01 +#define BOOT_DEVICE_NAND 0x05 +#define BOOT_DEVICE_MMC1 0x07 +#define BOOT_DEVICE_MMC2 0x08 +#define BOOT_DEVICE_SPI 0x0A +#define BOOT_DEVICE_USB 0x0D +#define BOOT_DEVICE_UART 0x41 +#define BOOT_DEVICE_USBETH 0x45 +#define BOOT_DEVICE_CPGMAC 0x47 + +#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1 +#ifdef CONFIG_SPL_USB_STORAGE +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB +#else +#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2 +#endif +#endif + +#endif |