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author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /arch/arm/include/asm/arch-stm32f7/syscfg.h | |
download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz |
import the U-Boot code and make it compile
Diffstat (limited to 'arch/arm/include/asm/arch-stm32f7/syscfg.h')
-rw-r--r-- | arch/arm/include/asm/arch-stm32f7/syscfg.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-stm32f7/syscfg.h b/arch/arm/include/asm/arch-stm32f7/syscfg.h new file mode 100644 index 0000000..ce2a952 --- /dev/null +++ b/arch/arm/include/asm/arch-stm32f7/syscfg.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2016 + * Michael Kurz, michi.kurz@gmail.com. + */ + +#ifndef _STM32_SYSCFG_H +#define _STM32_SYSCFG_H + +struct stm32_syscfg_regs { + u32 memrmp; + u32 pmc; + u32 exticr1; + u32 exticr2; + u32 exticr3; + u32 exticr4; + u32 cmpcr; +}; + +/* + * SYSCFG registers base + */ +#define STM32_SYSCFG ((struct stm32_syscfg_regs *)STM32_SYSCFG_BASE) + +/* SYSCFG peripheral mode configuration register */ +#define SYSCFG_PMC_MII_RMII_SEL BIT(23) + +#endif |