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| author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 15:43:26 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 15:43:26 +0800 |
| commit | a899a6c0ed9a3066557fb170850f977b6bd7366f (patch) | |
| tree | 78f7b1166fc1bd0265bcb61990130479528b09c4 /arch/arm/include/asm/arch-tegra210/tegra.h | |
| parent | 1a691f101632955a994a0198fc5498b108e97fbc (diff) | |
| download | uext4-a899a6c0ed9a3066557fb170850f977b6bd7366f.tar.xz | |
rm arch/arm/include/asm/arch-*
Diffstat (limited to 'arch/arm/include/asm/arch-tegra210/tegra.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra210/tegra.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/arm/include/asm/arch-tegra210/tegra.h b/arch/arm/include/asm/arch-tegra210/tegra.h deleted file mode 100644 index 1c6fba6..0000000 --- a/arch/arm/include/asm/arch-tegra210/tegra.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013-2015 - * NVIDIA Corporation <www.nvidia.com> - */ - -#ifndef _TEGRA210_TEGRA_H_ -#define _TEGRA210_TEGRA_H_ - -#define GICD_BASE 0x50041000 /* Generic Int Cntrlr Distrib */ -#define GICC_BASE 0x50042000 /* Generic Int Cntrlr CPU I/F */ -#define NV_PA_AHB_BASE 0x6000C000 /* System regs (AHB, etc.) */ -#define NV_PA_TSC_BASE 0x700F0000 /* System Counter TSC regs */ -#define NV_PA_MC_BASE 0x70019000 /* Mem Ctlr regs (MCB, etc.) */ -#define NV_PA_SDRAM_BASE 0x80000000 - -#include <asm/arch-tegra/tegra.h> - -#define BCT_ODMDATA_OFFSET 1288 /* offset to ODMDATA word */ - -#undef NVBOOTINFOTABLE_BCTSIZE -#undef NVBOOTINFOTABLE_BCTPTR -#define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */ -#define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */ - -#define MAX_NUM_CPU 4 -#define MCB_EMEM_ARB_OVERRIDE (NV_PA_MC_BASE + 0xE8) - -#define TEGRA_USB1_BASE 0x7D000000 - -#endif /* _TEGRA210_TEGRA_H_ */ |