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author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /include/configs/P5020DS.h | |
download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz |
import the U-Boot code and make it compile
Diffstat (limited to 'include/configs/P5020DS.h')
-rw-r--r-- | include/configs/P5020DS.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h new file mode 100644 index 0000000..873d39a --- /dev/null +++ b/include/configs/P5020DS.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2009-2011 Freescale Semiconductor, Inc. + */ + +/* + * P5020 DS board configuration file + * Also supports P5010 DS + */ +#define CONFIG_FSL_NGPIXIS /* use common ngPIXIS code */ + +#define CONFIG_NAND_FSL_ELBC +#define CONFIG_FSL_SATA_V2 +#define CONFIG_PCIE3 +#define CONFIG_PCIE4 +#define CONFIG_SYS_FSL_RAID_ENGINE +#define CONFIG_SYS_DPAA_RMAN + +#define CONFIG_SYS_SRIO +#define CONFIG_SRIO1 /* SRIO port 1 */ +#define CONFIG_SRIO2 /* SRIO port 2 */ +#define CONFIG_SRIO_PCIE_BOOT_MASTER +#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ + +#include "corenet_ds.h" |