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author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /include/configs/mx6_common.h | |
download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz |
import the U-Boot code and make it compile
Diffstat (limited to 'include/configs/mx6_common.h')
-rw-r--r-- | include/configs/mx6_common.h | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h new file mode 100644 index 0000000..07b1e06 --- /dev/null +++ b/include/configs/mx6_common.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. + */ + +#ifndef __MX6_COMMON_H +#define __MX6_COMMON_H + +#if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) +#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ +#define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK +#else +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 +#define CONFIG_SYS_PL310_BASE L2_PL310_BASE +#endif + +#endif +#define CONFIG_BOARD_POSTCLK_INIT +#define CONFIG_MXC_GPT_HCLK + +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> +#include <asm/mach-imx/gpio.h> + +#ifndef CONFIG_MX6 +#define CONFIG_MX6 +#endif + +#define CONFIG_SYS_FSL_CLK + +/* ATAGs */ +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +/* Boot options */ +#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ + defined(CONFIG_MX6SX) || \ + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) +#define CONFIG_LOADADDR 0x82000000 +#else +#define CONFIG_LOADADDR 0x12000000 +#endif +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_MAXARGS 32 + +/* MMC */ + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT +#endif + +#endif |