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| author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
| commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
| tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /include/configs/socfpga_cyclone5_socdk.h | |
| download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz | |
import the U-Boot code and make it compile
Diffstat (limited to 'include/configs/socfpga_cyclone5_socdk.h')
| -rw-r--r-- | include/configs/socfpga_cyclone5_socdk.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h new file mode 100644 index 0000000..028db2a --- /dev/null +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2014 Marek Vasut <marex@denx.de> + */ +#ifndef __CONFIG_SOCFPGA_CYCLONE5_H__ +#define __CONFIG_SOCFPGA_CYCLONE5_H__ + +#include <asm/arch/base_addr_ac5.h> + +/* Memory configurations */ +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on SoCDK */ + +/* Booting Linux */ +#define CONFIG_LOADADDR 0x01000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +/* The rest of the configuration is shared */ +#include <configs/socfpga_common.h> + +#endif /* __CONFIG_SOCFPGA_CYCLONE5_H__ */ |