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authorIru Cai <mytbk920423@gmail.com>2019-10-30 14:21:52 +0800
committerIru Cai <mytbk920423@gmail.com>2019-10-30 14:48:38 +0800
commitae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch)
tree6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /include/configs/ti_armv7_omap.h
downloaduext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz
import the U-Boot code and make it compile
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1 files changed, 28 insertions, 0 deletions
diff --git a/include/configs/ti_armv7_omap.h b/include/configs/ti_armv7_omap.h
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+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * ti_armv7_omap.h
+ *
+ * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * The various ARMv7 SoCs from TI all share a number of IP blocks when
+ * implementing a given feature. This is meant to isolate the features
+ * that are based on OMAP architecture.
+ */
+#ifndef __CONFIG_TI_ARMV7_OMAP_H__
+#define __CONFIG_TI_ARMV7_OMAP_H__
+
+/*
+ * GPMC NAND block. We support 1 device and the physical address to
+ * access CS0 at is 0x8000000.
+ */
+#ifdef CONFIG_NAND
+#ifndef CONFIG_SYS_NAND_BASE
+#define CONFIG_SYS_NAND_BASE 0x8000000
+#endif
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#endif
+
+/* Now for the remaining common defines */
+#include <configs/ti_armv7_common.h>
+
+#endif /* __CONFIG_TI_ARMV7_OMAP_H__ */