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author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 15:44:39 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 15:44:39 +0800 |
commit | 63cf543b3cc4d6e21d680bde234f697a5588c66e (patch) | |
tree | 6b1ea4cd9525e1ebeee8fb5ed427127197707022 /include/dt-bindings/clock/stih410-clks.h | |
parent | a899a6c0ed9a3066557fb170850f977b6bd7366f (diff) | |
download | uext4-63cf543b3cc4d6e21d680bde234f697a5588c66e.tar.xz |
rm include/dt-bindings
Diffstat (limited to 'include/dt-bindings/clock/stih410-clks.h')
-rw-r--r-- | include/dt-bindings/clock/stih410-clks.h | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/include/dt-bindings/clock/stih410-clks.h b/include/dt-bindings/clock/stih410-clks.h deleted file mode 100644 index 2097a4b..0000000 --- a/include/dt-bindings/clock/stih410-clks.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This header provides constants clk index STMicroelectronics - * STiH410 SoC. - */ -#ifndef _DT_BINDINGS_CLK_STIH410 -#define _DT_BINDINGS_CLK_STIH410 - -#include "stih407-clks.h" - -/* STiH410 introduces new clock outputs compared to STiH407 */ - -/* CLOCKGEN C0 */ -#define CLK_TX_ICN_HADES 32 -#define CLK_RX_ICN_HADES 33 -#define CLK_ICN_REG_16 34 -#define CLK_PP_HADES 35 -#define CLK_CLUST_HADES 36 -#define CLK_HWPE_HADES 37 -#define CLK_FC_HADES 38 - -/* CLOCKGEN D0 */ -#define CLK_PCMR10_MASTER 4 -#define CLK_USB2_PHY 5 - -#endif |