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| author | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:21:52 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-10-30 14:48:38 +0800 |
| commit | ae51f41d14f548d494ac41e0d21137c5a4c3f59c (patch) | |
| tree | 6ddb9d1aaa7bd5bad5bbf8497edc2e08ff208d79 /include/versalpl.h | |
| download | uext4-ae51f41d14f548d494ac41e0d21137c5a4c3f59c.tar.xz | |
import the U-Boot code and make it compile
Diffstat (limited to 'include/versalpl.h')
| -rw-r--r-- | include/versalpl.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/include/versalpl.h b/include/versalpl.h new file mode 100644 index 0000000..b94c82e --- /dev/null +++ b/include/versalpl.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * (C) Copyright 2019 Xilinx, Inc, + * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> + */ + +#ifndef _VERSALPL_H_ +#define _VERSALPL_H_ + +#include <xilinx.h> + +#define VERSAL_PM_LOAD_PDI 0x701 +#define VERSAL_PM_PDI_TYPE 0xF + +extern struct xilinx_fpga_op versal_op; + +#define XILINX_VERSAL_DESC \ +{ xilinx_versal, csu_dma, 1, &versal_op, 0, &versal_op } + +#endif /* _VERSALPL_H_ */ |