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-rw-r--r--arch/arm/include/asm/cache.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index 950ec1e..57e2149 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -47,6 +47,10 @@ void dram_bank_mmu_setup(int bank);
* value than found in the L1 cache but this is OK to use in terms of
* alignment.
*/
+#ifdef CONFIG_SYS_CACHELINE_SIZE
#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
+#else
+#define ARCH_DMA_MINALIGN 64 /* should be enough */
+#endif
#endif /* _ASM_CACHE_H */