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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:15 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:15 -0500 |
| commit | 92bdf57be45bd366cdf1a26630d761f58eaacbdd (patch) | |
| tree | e4efd24b4930fbe75d09c48fdfaafbee518bb209 | |
| parent | 43980752546cfa7ca90a11f0a2b68e1657dc6cab (diff) | |
| download | gem5-92bdf57be45bd366cdf1a26630d761f58eaacbdd.tar.xz | |
ARM: Even though writes to MVFR0/1 should be unpredictable, we need to make them to do nothing.
| -rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 284876311..d509fc28a 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -328,6 +328,12 @@ let {{ case 1: specReg = MISCREG_FPSCR; break; + case 6: + specReg = MISCREG_MVFR1; + break; + case 7: + specReg = MISCREG_MVFR0; + break; case 8: specReg = MISCREG_FPEXC; break; |