index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
arch
/
arm
/
fastmodel
/
iris
/
thread_context.hh
Age
Commit message (
Expand
)
Author
2020-01-22
fastmodel: Implement CC reg accessors.
Gabe Black
2020-01-07
fastmodel: Implement the vecPredReg accessor functions.
Gabe Black
2019-12-27
fastmodel: Move ARM but not CortexA76 specific bits to the IRIS TC.
Gabe Black
2019-12-24
fastmodel: Determine what space to use for breakpoints dynamically.
Gabe Black
2019-12-23
fastmodel: Implement PC based events.
Gabe Black
2019-12-17
fastmodel: Implement port proxies.
Gabe Black
2019-12-17
fastmodel: Add an address translation mechanism to the ThreadContext.
Gabe Black
2019-12-10
arch,cpu,sim: Push syscall number determination up to processes.
Gabe Black
2019-11-07
fastmodel: Plumb the ITB and DTB through the IRIS thread context.
Gabe Black
2019-11-06
fastmodel: Implement inst count events in the IRIS thread contexts.
Gabe Black
2019-10-25
cpu: Get rid of the nextInstEventCount method.
Gabe Black
2019-10-25
cpu: Get rid of the serviceInstCountEvents method.
Gabe Black
2019-10-25
fastmodel: Use getCurrentInstCount for totalInsts().
Gabe Black
2019-10-25
fastmodel: Implement getCurrentInstCount.
Gabe Black
2019-10-25
cpu: Switch off of the CPU's comInstEventQueue.
Gabe Black
2019-10-25
cpu: Make the ThreadContext a PCEventScope.
Gabe Black
2019-09-27
fastmodel: Add glue code which adapts fastmodels to run in gem5.
Gabe Black