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path: root/src/arch/arm/fastmodel/iris/thread_context.hh
AgeCommit message (Expand)Author
2020-01-22fastmodel: Implement CC reg accessors.Gabe Black
2020-01-07fastmodel: Implement the vecPredReg accessor functions.Gabe Black
2019-12-27fastmodel: Move ARM but not CortexA76 specific bits to the IRIS TC.Gabe Black
2019-12-24fastmodel: Determine what space to use for breakpoints dynamically.Gabe Black
2019-12-23fastmodel: Implement PC based events.Gabe Black
2019-12-17fastmodel: Implement port proxies.Gabe Black
2019-12-17fastmodel: Add an address translation mechanism to the ThreadContext.Gabe Black
2019-12-10arch,cpu,sim: Push syscall number determination up to processes.Gabe Black
2019-11-07fastmodel: Plumb the ITB and DTB through the IRIS thread context.Gabe Black
2019-11-06fastmodel: Implement inst count events in the IRIS thread contexts.Gabe Black
2019-10-25cpu: Get rid of the nextInstEventCount method.Gabe Black
2019-10-25cpu: Get rid of the serviceInstCountEvents method.Gabe Black
2019-10-25fastmodel: Use getCurrentInstCount for totalInsts().Gabe Black
2019-10-25fastmodel: Implement getCurrentInstCount.Gabe Black
2019-10-25cpu: Switch off of the CPU's comInstEventQueue.Gabe Black
2019-10-25cpu: Make the ThreadContext a PCEventScope.Gabe Black
2019-09-27fastmodel: Add glue code which adapts fastmodels to run in gem5.Gabe Black