| Age | Commit message (Expand) | Author |
|---|
| 2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
| 2019-12-05 | arch-x86: Adding LDDQU instruction | marjanfariborz |
| 2019-11-01 | arch-x86: Fix FLDCW_P and FNSTCW_P to use rip. | seanzw |
| 2019-10-15 | arch-x86: Make LFENCE a serializing instruction | Isaac Richter |
| 2019-09-20 | arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts | Pouya Fotouhi |
| 2019-09-19 | arch-x86: Change warn to warn_once for NT instructions | Hoa Nguyen |
| 2019-09-18 | arch, x86: Rework the debug faults and microops. | Gabe Black |
| 2019-09-05 | arch-x86: Adding warning for movnti | Pouya Fotouhi |
| 2019-09-05 | arch-x86: implement movntq/movntdq instructions | Pouya Fotouhi |
| 2019-08-15 | x86: Make unsuccessful CPUID instructions zero the result. | Gabe Black |
| 2019-07-16 | arch-x86: add unconditional tag to calls/returns | Hoa Nguyen |
| 2019-05-31 | x86: fix movsd bug on %xmm register | Brandon Potter |
| 2019-02-12 | python: Replace dict.has_key with 'key in dict' | Andreas Sandberg |
| 2019-01-31 | x86: Stop using/defining some ISA specific register types. | Gabe Black |
| 2019-01-31 | arch: cpu: Rename *FloatRegBits* to *FloatReg*. | Gabe Black |
| 2018-11-21 | x86: Get rid of a problematic DPRINTF in PremFp. | Gabe Black |
| 2018-05-24 | x86: Add op classes to the MediaOps. | Gabe Black |
| 2018-05-02 | arch-x86: implement movntps/movntpd SSE insts | Steve Reinhardt |
| 2018-05-02 | x86: Add a ld/st microop flag for marking an access uncacheable. | Gabe Black |
| 2018-03-15 | x86: Add bitfields which can gather/scatter bases and limits. | Gabe Black |
| 2018-03-14 | x86: Simplify the implementations of RDTSC and RDTSCP slightly. | Gabe Black |
| 2018-03-14 | x86: Implement the RDTSCP instruction. | Gabe Black |
| 2018-03-14 | x86: Mark the RDTSC instruction as .serialize_before. | Gabe Black |
| 2018-03-14 | x86: Replace the .serializing directive with .serialize_(before|after). | Gabe Black |
| 2018-01-23 | arch-x86: Adding clflush, clflushopt, clwb instructions | Swapnil Haria |
| 2017-12-23 | riscv,x86: Stop using the arch Nop machine instruction unnecessarily. | Gabe Black |
| 2017-12-14 | misc: Updates for gcc7.2 for x86 | Jason Lowe-Power |
| 2017-12-14 | x86: Use operand size 4 when it would be 2 for cmpxchg8b. | Gabe Black |
| 2017-12-13 | arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with. | Gabe Black |
| 2017-12-13 | x86: Rework how "split" loads/stores are handled. | Gabe Black |
| 2017-12-06 | x86: Split apart x87's FSW and TOP, and add a missing break. | Gabe Black |
| 2017-12-05 | x86: LOOP's operand size defaults to 64 bits in 64 bit mode. | Gabe Black |
| 2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
| 2017-11-07 | alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates. | Gabe Black |
| 2017-11-02 | alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts. | Gabe Black |
| 2017-09-27 | arch-x86: fix CondInst decoding for MOV to Control Registers | Bjoern A. Zeeb |
| 2017-08-28 | x86: Use the new CondInst format for moves to/from control registers. | Gabe Black |
| 2017-08-28 | x86: Add a "CondInst" format for conditionally decoded instructions. | Gabe Black |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2017-05-26 | x86: Rework how VEX prefixes are decoded. | Gabe Black |
| 2017-05-16 | x86: Fix the multiplication microops. | Gabe Black |
| 2015-07-20 | syscall_emul: [patch 13/22] add system call retry capability | Brandon Potter |
| 2017-02-10 | x86: Fix implicit stack addressing in 64-bit mode | Jason Lowe-Power |
| 2016-11-21 | x86: fix issue with casting in Cvtf2i | Tony Gutierrez |
| 2016-10-26 | dev: Add m5 op to toggle synchronization for dist-gem5. | Michael LeBeane |
| 2016-02-06 | x86: revamp cmpxchg8b/cmpxchg16b implementation | Alexandru Dutu |
| 2016-02-06 | arch, x86: add support for arrays as memory operands | Steve Reinhardt |
| 2016-02-06 | style: remove trailing whitespace | Steve Reinhardt |
| 2016-01-17 | cpu. arch: add initiateMemRead() to ExecContext interface | Steve Reinhardt |
