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gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
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path:
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src
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arch
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x86
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nativetrace.cc
Age
Commit message (
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)
Author
2019-11-07
x86: Replace htog and gtoh with htole and letoh.
Gabe Black
2019-01-31
arch: cpu: Rename *FloatRegBits* to *FloatReg*.
Gabe Black
2016-11-09
style: [patch 1/22] use /r/3648/ to reorganize includes
Brandon Potter
2016-02-06
style: fix missing spaces in control statements
Steve Reinhardt
2012-03-19
gcc: Clean-up of non-C++0x compliant code, first steps
Andreas Hansson
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-03-02
X86: Use the npc as the pc when doing a nativetrace, not what M5 considers th...
Gabe Black
2011-01-03
Make commenting on close namespace brackets consistent.
Steve Reinhardt
2010-10-31
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
Gabe Black
2010-09-13
Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.
Gabe Black
2010-08-23
X86: Create a directory for files that define register indexes.
Gabe Black
2009-07-19
CPU: Separate out native trace into ISA (in)dependent code and SimObjects.
Gabe Black