gem5 - gem5

Age	Commit message (Expand)	Author
2018-11-16	cpu: Fix the usage of const DynInstPtr	Rekai Gonzalez-Alberquilla
2018-06-11	misc: Using smart pointers for memory Requests	Giacomo Travaglini
2017-07-05	cpu: Added interface for vector reg file	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Result refactoring	Rekai Gonzalez-Alberquilla
2017-07-05	cpu: Simplify the rename interface and use RegId	Rekai Gonzalez-Alberquilla
2017-07-05	arch, cpu: Architectural Register structural indexing	Nathanael Premillieu
2016-04-07	mem: Remove threadId from memory request class	Mitch Hayenga
2016-04-06	Revert power patch sets with unexpected interactions	Andreas Sandberg
2016-04-05	mem: Remove threadId from memory request class	Mitch Hayenga
2015-07-28	revert 5af8f40d8f2c	Nilay Vaish
2015-07-26	cpu: implements vector registers	Nilay Vaish
2014-10-09	cpu: Remove Ozone CPU from the source tree	Mitch Hayenga
2014-09-27	arch: Use const StaticInstPtr references where possible	Andreas Hansson
2014-09-19	arch: Pass faults by const reference where possible	Andreas Hansson
2014-01-24	checker: CheckerCPU handling of MiscRegs was incorrect	Geoffrey Blake
2013-11-15	cpu: Fix Checker register index use	Andreas Hansson
2013-10-17	cpu: add consistent guarding to *_impl.hh files.	Matt Horsnell
2013-10-15	cpu: add a condition-code register class	Yasuko Eckert
2013-10-15	cpu: rename _DepTag constants to _Reg_Base	Steve Reinhardt
2013-10-15	cpu: clean up architectural register classification	Steve Reinhardt
2013-01-07	cpu: rename the misleading inSyscall to noSquashFromTC	Ali Saidi
2013-01-04	Decoder: Remove the thread context get/set from the decoder.	Gabe Black
2012-05-26	CPU: Merge the predecoder and decoder.	Gabe Black
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-03-09	CheckerCPU: Add function stubs to non-ARM ISA source to compile with CheckerCPU	Geoffrey Blake
2012-03-09	CheckerCPU: Make CheckerCPU runtime selectable instead of compile selectable	Geoffrey Blake
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-31	Merge with head, hopefully the last time for this batch.	Gabe Black
2012-01-31	CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5	Geoffrey Blake
2011-11-18	SE/FS: Get rid of FULL_SYSTEM in the CPU directory.	Gabe Black
2011-04-15	includes: sort all includes	Nathan Binkert
2011-01-07	Replace curTick global variable with accessor functions.	Steve Reinhardt
2010-09-13	CPU: Get rid of the now unnecessary getInst/setInst family of functions.	Gabe Black
2010-09-13	Faults: Pass the StaticInst involved, if any, to a Fault's invoke method.	Gabe Black
2009-09-23	arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh	Nathan Binkert
2009-02-25	ISA: Replace the translate functions in the TLBs with translateAtomic.	Gabe Black
2009-02-25	CPU: Get rid of translate... functions from various interface classes.	Gabe Black
2008-11-02	Add in Context IDs to the simulator. From now on, cpuId is almost never used,	Lisa Hsu
2008-11-02	make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered	Lisa Hsu
2008-09-10	style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...	Ali Saidi
2007-03-07	MiscReg->MiscRegNoEffect, MiscRegWithEffect->MiscReg	Ali Saidi
2006-11-02	Use ISA specific makeExtMI.	Kevin Lim
2006-10-20	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
2006-10-19	refactor code for the packet, get rid of packet_impl.hh	Nathan Binkert
2006-10-02	Merge zizzer.eecs.umich.edu:/bk/newmem	Gabe Black
2006-10-02	Updates to fix merge issues and bring almost everything up to working speed. ...	Kevin Lim
2006-09-30	Merge ktlim@zamp:./local/clean/o3-merge/m5	Kevin Lim
2006-09-30	Changed makeExtMI to take a ThreadContext instead of a pc.	Gabe Black
2006-07-05	Remove sampler and serializer. Now they are handled through C++ interacting ...	Kevin Lim