| Age | Commit message (Expand) | Author |
|---|
| 2019-12-11 | cpu: Fix coding style (byteEnable->byte_enable) | Giacomo Travaglini |
| 2019-12-11 | cpu: Add byteEnable assertions to readMem and initateMemRead | Giacomo Travaglini |
| 2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
| 2019-12-03 | cpu,sim-se: move error checks in syscall methods | Brandon Potter |
| 2019-09-23 | cpu, mem: Changing AtomicOpFunctor* for unique_ptr<AtomicOpFunctor> | Jordi Vaquero |
| 2019-07-27 | cpu: Add first-/non-faulting load support to Minor and O3 | Gabor Dozsa |
| 2019-05-11 | cpu,mem: Add support for partial loads/stores and wide mem. accesses | Giacomo Gabrielli |
| 2019-05-11 | cpu: Add a memory access predicate | Giacomo Gabrielli |
| 2019-04-30 | cpu: alpha: Delete all occurrances of the simPalCheck function. | Gabe Black |
| 2019-04-30 | cpu: Remove hwrei from the generic interfaces. | Gabe Black |
| 2019-04-29 | cpu: Get rid of the (read|set)RegOtherThread methods. | Gabe Black |
| 2019-02-08 | cpu: support atomic memory request type with AtomicOpFunctor | Tuan Ta |
| 2019-02-05 | misc: added missing override specifier | Andrea Mondelli |
| 2019-02-01 | cpu, arch: Replace the CCReg type with RegVal. | Gabe Black |
| 2019-01-31 | arch: cpu: Rename *FloatRegBits* to *FloatReg*. | Gabe Black |
| 2019-01-30 | arch,cpu: Add vector predicate registers | Giacomo Gabrielli |
| 2019-01-25 | cpu: Fix VecElemClass bugs in cpu models | Giacomo Travaglini |
| 2019-01-22 | arch: cpu: Stop passing around misc registers by reference. | Gabe Black |
| 2019-01-16 | cpu: dev: sim: gpu-compute: Banish some ISA specific register types. | Gabe Black |
| 2018-12-20 | arch, cpu: Remove float type accessors. | Gabe Black |
| 2018-11-16 | cpu: Fix the usage of const DynInstPtr | Rekai Gonzalez-Alberquilla |
| 2018-01-09 | cpu, power: Get rid of the remnants of the EA computation insts. | Gabe Black |
| 2017-07-05 | cpu: Added interface for vector reg file | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | cpu: Simplify the rename interface and use RegId | Rekai Gonzalez-Alberquilla |
| 2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
| 2015-07-20 | syscall_emul: [patch 13/22] add system call retry capability | Brandon Potter |
| 2016-08-15 | cpu: Add missing override in Minor's exec context | Andreas Sandberg |
| 2016-08-15 | cpu: Fixed clang errors. Added 'override' keyword for virtual functions. | Reiley Jeapaul |
| 2016-08-15 | cpu, arch: fix the type used for the request flags | Nikos Nikoleris |
| 2016-07-21 | cpu: Add SMT support to MinorCPU | Mitch Hayenga |
| 2016-01-17 | cpu. arch: add initiateMemRead() to ExecContext interface | Steve Reinhardt |
| 2015-09-30 | cpu: Add per-thread monitors | Mitch Hayenga |
| 2015-08-07 | base: Declare a type for context IDs | Andreas Sandberg |
| 2015-07-28 | revert 5af8f40d8f2c | Nilay Vaish |
| 2015-07-26 | cpu: implements vector registers | Nilay Vaish |
| 2015-02-16 | arch: Make readMiscRegNoEffect const throughout | Andreas Hansson |
| 2014-11-06 | x86 isa: This patch attempts an implementation at mwait. | Marc Orr |
| 2014-09-03 | arch, cpu: Factor out the ExecContext into a proper base class | Andreas Sandberg |
| 2014-07-23 | cpu: `Minor' in-order CPU model | Andrew Bardsley |
