gem5 - gem5

Age	Commit message (Expand)	Author
2018-06-11	misc: Using smart pointers for memory Requests	Giacomo Travaglini
2018-06-11	misc: Substitute pointer to Request with aliased RequestPtr	Giacomo Travaglini
2018-04-27	sim,cpu,mem,arch: Introduced MasterInfo data structure	Giacomo Travaglini
2018-03-23	ruby: Make sure addresses print in hex	Jason Lowe-Power
2017-12-04	misc: Rename misc.(hh\|cc) to logging.(hh\|cc)	Gabe Black
2017-07-12	testers: Refactor some Event subclasses to lambdas	Sean Wilson
2016-11-09	style: [patch 3/22] reduce include dependencies in some headers	Brandon Potter
2016-11-09	style: [patch 1/22] use /r/3648/ to reorganize includes	Brandon Potter
2016-04-07	mem: Remove threadId from memory request class	Mitch Hayenga
2016-04-06	Revert power patch sets with unexpected interactions	Andreas Sandberg
2016-04-05	mem: Remove threadId from memory request class	Mitch Hayenga
2015-07-20	ruby: more flexible ruby tester support	Brad Beckmann
2015-10-12	misc: Remove redundant compiler-specific defines	Andreas Hansson
2015-08-29	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-19	ruby: reverts to changeset: bf82f1f7b040	Nilay Vaish
2015-08-14	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-14	ruby: replace Address by Addr	Nilay Vaish
2015-08-11	ruby: drop some redundant includes	Nilay Vaish
2015-07-10	ruby: replace global g_abs_controls with per-RubySystem var	Brandon Potter
2015-03-02	mem: Split port retry for all different packet classes	Andreas Hansson
2014-12-02	mem: Assume all dynamic packet data is array allocated	Andreas Hansson
2014-12-02	mem: Add const getters for write packet data	Andreas Hansson
2014-12-02	mem: Remove null-check bypassing in Packet::getPtr	Andreas Hansson
2014-09-27	misc: Fix a bunch of minor issues identified by static analysis	Andreas Hansson
2014-09-03	base: Use the global Mersenne twister throughout	Andreas Hansson
2014-09-01	ruby: eliminate type Time	Nilay Vaish
2013-02-19	mem: Add predecessor to SenderState base class	Andreas Hansson
2013-01-17	ruby: remove calls to g_system_ptr->getTime()	Nilay Vaish
2012-11-02	sim: Include object header files in SWIG interfaces	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-09-11	Ruby: Use uint8_t instead of uint8 everywhere	Nilay Vaish
2012-08-27	Ruby: Remove RubyEventQueue	Nilay Vaish
2012-07-10	ruby: remove the cpu assumptions for the random tester	Brad Beckmann
2012-05-30	Packet: Unify the use of PortID in packet and port	Andreas Hansson
2012-05-01	MEM: Separate requests and responses for timing accesses	Andreas Hansson
2012-04-25	MEM: Add the PortId type and a corresponding id field to Port	Andreas Hansson
2012-04-14	Ruby: Use MasterPort base-class pointers where possible	Andreas Hansson
2012-04-14	MEM: Remove the Broadcast destination from the packet	Andreas Hansson
2012-04-14	MEM: Separate snoops and normal memory requests/responses	Andreas Hansson
2012-04-06	rubytest: remove spurious printf	Brad Beckmann
2012-04-06	rubytest: seperated read and write ports.	Brad Beckmann
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-02-24	Ruby: Simplify tester ports by not using SimpleTimingPort	Andreas Hansson
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-13	MEM: Introduce the master/slave port roles in the Python classes	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2011-11-03	Ruby: Remove some unused typedefs	Nilay Vaish
2011-08-08	BuildEnv: Eliminate RUBY as build environment variable	Nilay Vaish
2011-06-02	scons: rename TraceFlags to DebugFlags	Nathan Binkert
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert