Age | Commit message (Expand) | Author |
2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
2019-04-29 | mips: Implement readRegOtherThread and setRegOtherThread directly. | Gabe Black |
2018-11-06 | mips: Clean up type overrides for operands. | Gabe Black |
2017-12-22 | arch,cpu: "virtualize" the TLB interface. | Gabe Black |
2017-07-05 | arch, cpu: Architectural Register structural indexing | Nathanael Premillieu |
2015-07-20 | syscall_emul: [patch 13/22] add system call retry capability | Brandon Potter |
2016-02-06 | style: remove trailing whitespace | Steve Reinhardt |
2016-01-11 | scons: Enable -Wextra by default | Andreas Hansson |
2014-10-16 | arch: Use shared_ptr for all Faults | Andreas Hansson |
2013-12-29 | mips: Floating point convert bug fix | Christopher Torng |
2013-10-15 | cpu: rename *_DepTag constants to *_Reg_Base | Steve Reinhardt |
2012-03-19 | clang: Fix recently introduced clang compilation errors | Andreas Hansson |
2012-01-16 | Merge yet again with the main repository. | Gabe Black |
2012-01-12 | mips: Fix decoder of two float-convert instructions | Deyuan Guo |
2012-01-07 | Merge with main repository. | Gabe Black |
2011-10-31 | GCC: Get everything working with gcc 4.6.1. | Gabe Black |
2011-09-30 | SE/FS: Use the new FullSystem constant where possible. | Gabe Black |
2011-09-26 | ISA parser: Use '_' instead of '.' to delimit type modifiers on operands. | Gabe Black |
2011-09-19 | MIPS: Get rid of cruft in the fault classes. | Gabe Black |
2011-09-19 | MIPS: Get rid of #if style config checks in the ISA description. | Gabe Black |
2011-06-22 | mips: fix nmsub and nmadd definitions | Deyaun Guo |
2011-02-12 | inorder: remove unused isa ops | Korey Sewell |
2010-12-20 | Style: Replace some tabs with spaces. | Gabe Black |
2010-12-08 | MIPS: Take advantage of new PCState syntax. | Gabe Black |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-10-16 | Mem: Reclaim some request flags used by MIPS for alignment checking. | Gabe Black |
2009-12-31 | MIPS: Implement the SE mode version of rdhwr. | Gabe Black |
2009-12-31 | MIPS: Fix decoding of the rdhwr instruction. | Gabe Black |
2009-07-22 | MIPS: Small fix I forgot to qrefresh into my last change. | Gabe Black |
2009-07-22 | MIPS: Style/formatting sweep of the decoder itself. | Gabe Black |
2009-07-21 | MIPS: Format the register index constants like the other ISAs. | Gabe Black |
2009-07-21 | MIPS: Get MIPS_FS to compile, more style fixes. | Gabe Black |
2009-07-20 | MIPS: Use BitUnions instead of bits() functions and constants. | Gabe Black |
2009-04-19 | Memory: Rename LOCKED for load locked store conditional to LLSC. | Gabe Black |
2009-04-18 | mips-syscall: mark with correct flag. \nMIPS was using wrong serialization fl... | Korey Sewell |
2009-04-18 | o3-delay-slot-bpred: fix decode stage handling of uncdtl. branches.\n decode ... | Korey Sewell |
2008-10-06 | fix shadow set bugs in MIPS code that caused out of bounds access... | Korey Sewell |
2008-09-27 | gcc: Add extra parens to quell warnings. | Nathan Binkert |
2007-11-15 | fix MIPS headers | Korey Sewell |
2007-11-15 | Get MIPS simple regression working. Take out unecessary functions "setShadowS... | Korey Sewell |
2007-11-13 | Add in files from merge-bare-iron, get them compiling in FS and SE mode | Korey Sewell |
2007-07-31 | Add a flag to indicate an instruction triggers a syscall in SE mode. | Gabe Black |
2007-06-29 | fix store instructions, pass fast/quick Atomic/TimingSimpleCPU regressions... | Korey Sewell |
2007-06-22 | mips import pt. 1 | Korey Sewell |
2007-03-07 | *MiscReg->*MiscRegNoEffect, *MiscRegWithEffect->*MiscReg | Ali Saidi |
2007-02-13 | Update MIPS ISA description to work with new write result interface | Steve Reinhardt |
2007-01-25 | Fixed a warning that was breaking compilation. | Gabe Black |
2006-12-17 | Minor cleanup of new snippet/subst code. | Steve Reinhardt |
2006-07-26 | MIPS ISA runs 'hello world' in O3CPU ... | Korey Sewell |
2006-07-23 | This changeset gets the MIPS ISA pretty much working in the O3CPU. It builds,... | Korey Sewell |