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path: root/src/arch/sparc/isa.hh
AgeCommit message (Expand)Author
2019-01-30arch,cpu: Add vector predicate registersGiacomo Gabrielli
2019-01-22sparc: Get rid of some register type definitions.Gabe Black
2019-01-22arch: cpu: Stop passing around misc registers by reference.Gabe Black
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-07-28revert 5af8f40d8f2cNilay Vaish
2015-07-26cpu: implements vector registersNilay Vaish
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-02-16arch: Make readMiscRegNoEffect const throughoutAndreas Hansson
2014-01-24arch: Make all register index flattening constAndreas Hansson
2014-01-24arch, cpu: Add support for flattening misc register indexes.Ali Saidi
2013-10-15cpu: add a condition-code register classYasuko Eckert
2013-02-19scons: Add warning for overloaded virtual functionsAndreas Hansson
2013-01-12x86: Changes to decoder, corrects 9376Nilay Vaish
2013-01-07arch: Move the ISA object to a separate sectionAndreas Sandberg
2013-01-07arch: Make the ISA class inherit from SimObjectAndreas Sandberg
2012-02-11SPARC: Make PSTATE and HPSTATE a BitUnion.Gabe Black
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-10-09[mq]: sefssparcregfile.patchGabe Black
2011-04-15includes: sort all includesNathan Binkert
2010-11-11SPARC: Clean up some historical style issues.Gabe Black
2010-10-10SPARC: Make SPARC's ISA's clear function initialize everything it should.Gabe Black
2009-07-10SPARC: Set up a lookup table for integer register flattening.Gabe Black
2009-07-09SPARC: Fold the MiscRegFile all the way into the ISA object.Gabe Black
2009-07-08Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.Gabe Black
2009-07-08Registers: Add an ISA object which replaces the MiscRegFile.Gabe Black