Age | Commit message (Expand) | Author |
2019-12-10 | arch,cpu,sim: Push syscall number determination up to processes. | Gabe Black |
2019-12-05 | arch-x86: Adding LDDQU instruction | marjanfariborz |
2019-10-15 | arch-x86: Make LFENCE a serializing instruction | Isaac Richter |
2019-09-20 | arch-x86: ignore non-temporal hint for movntps/movntpd SSE insts | Pouya Fotouhi |
2019-09-05 | arch-x86: Adding warning for movnti | Pouya Fotouhi |
2019-09-05 | arch-x86: implement movntq/movntdq instructions | Pouya Fotouhi |
2019-08-15 | x86: Make unsuccessful CPUID instructions zero the result. | Gabe Black |
2018-05-02 | arch-x86: implement movntps/movntpd SSE insts | Steve Reinhardt |
2018-03-14 | x86: Implement the RDTSCP instruction. | Gabe Black |
2018-01-23 | arch-x86: Adding clflush, clflushopt, clwb instructions | Swapnil Haria |
2017-09-27 | arch-x86: fix CondInst decoding for MOV to Control Registers | Bjoern A. Zeeb |
2017-08-28 | x86: Use the new CondInst format for moves to/from control registers. | Gabe Black |
2015-07-20 | syscall_emul: [patch 13/22] add system call retry capability | Brandon Potter |
2016-10-26 | dev: Add m5 op to toggle synchronization for dist-gem5. | Michael LeBeane |
2016-01-07 | pseudo inst,util: Add optional key to initparam pseudo instruction | Gabor Dozsa |
2015-10-06 | x86: implement rcpps and rcpss SSE insts | Steve Reinhardt |
2015-07-20 | x86: x86 instruction-implementation bug fixes | David Hashe |
2015-01-03 | x86: implements the simd128 ADDSUBPD instruction | Maxime Martinasso |
2014-12-04 | x86: Rework opcode parsing to support 3 byte opcodes properly. | Gabe Black |
2014-11-06 | x86 isa: This patch attempts an implementation at mwait. | Marc Orr |
2014-09-03 | x86: Flag instructions that call suspend as IsQuiesce | Mitch Hayenga |
2013-09-30 | x86: Add support for FXSAVE, FXSAVE64, FXRSTOR, and FXRSTOR64 | Andreas Sandberg |
2013-01-15 | x86: implements emms instruction | Nilay Vaish |
2013-01-08 | util: add m5_fail op. | LluĂs Vilanova |
2012-06-04 | X86: Ensure that the CPUID instruction always writes its outputs. | Gabe Black |
2012-05-19 | x86 ISA: Implement the sse3 haddps instruction. | Marc Orr |
2012-03-19 | clang: Fix recently introduced clang compilation errors | Andreas Hansson |
2011-09-30 | SE/FS: Use the new FullSystem constant where possible. | Gabe Black |
2011-09-19 | X86: Don't use "#if FULL_SYSTEM" in the X86 ISA description. | Gabe Black |
2011-09-19 | PseudoInst: Remove the now unnecessary #if FULL_SYSTEMs around pseudoinsts. | Gabe Black |
2011-09-18 | Pseudoinst: Add an initParam pseudo inst function. | Gabe Black |
2011-02-06 | m5: added work completed monitoring support | Brad Beckmann |
2010-12-08 | X86: Take advantage of new PCState syntax. | Gabe Black |
2010-10-31 | ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors. | Gabe Black |
2010-10-29 | X86: Make syscalls also serialize after. | Gabe Black |
2010-10-22 | X86: Make syscall instructions non-speculative in SE. | Gabe Black |
2010-05-23 | copyright: Change HP copyright on x86 code to be more friendly | Nathan Binkert |
2010-05-02 | X86: Sometimes CPUID depends on ecx, so pass that in. | Gabe Black |
2009-10-30 | X86: Add support for x86 psrldq and pslldq instructions | Vince Weaver |
2009-10-30 | X86: Implement movd_Vo_Edp on X86 | Vince Weaver |
2009-10-30 | X86: Implement the X86 sse2 haddpd instruction | Vince Weaver |
2009-10-21 | Implement X86 sse2 movdqu and movdqa instructions | Vince Weaver |
2009-08-18 | X86: Decode the immediate byte opcode extension for 3dNow! instructions. | Gabe Black |
2009-08-18 | X86: Decode three byte opcodes. | Gabe Black |
2009-08-17 | X86: Double check the two byte portion of the decoder and fix bugs/clean up. | Gabe Black |
2009-08-17 | X86: Implement MOVNTI. | Gabe Black |
2009-08-17 | X86: Implement MOVQ2DQ. | Gabe Black |
2009-08-17 | X86: Implement MOVDQ2Q. | Gabe Black |
2009-08-17 | X86: Implement the media instructions that convert fp values to ints. | Gabe Black |
2009-08-17 | X86: Implement the instructions that compare fp values and write a mask as a ... | Gabe Black |