gem5 - gem5

Age	Commit message (Expand)	Author
2018-11-15	mem-cache: Make StridePrefetcher use Replacement Policies	Daniel
2018-11-15	mem-cache: Cleanup prefetchers	Daniel
2018-11-14	mem-cache: implement a probe-based interface	Javier Bueno
2014-12-23	mem: Rework the structuring of the prefetchers	Mitch Hayenga
2014-10-16	mem: Dynamically determine page bytes in memory components	Andreas Hansson
2014-09-20	mem: Remove the GHB prefetcher from the source tree	Mitch Hayenga
2014-01-29	mem: Allowed tagged instruction prefetching in stride prefetcher	Mitch Hayenga
2014-01-29	mem: prefetcher: add options, support for unaligned addresses	Mitch Hayenga ext:(%2C%20Amin%20Farmahini%20%3Caminfar%40gmail.com%3E)
2012-11-02	sim: Include object header files in SWIG interfaces	Andreas Sandberg
2012-10-15	Mem: Use cycles to express cache-related latencies	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-02-12	prefetcher: Make prefetcher a sim object instead of it being a parameter on c...	Mrinmoy Ghosh